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Avoid equalizer module processing HT_STF symbol

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mmehari 2022-01-04 22:45:47 +01:00
parent 0c75a8e8f2
commit 23e61e6a29
1 changed files with 1 additions and 1 deletions
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2
verilog/dot11.v
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@ -371,7 +371,7 @@ equalizer equalizer_inst (
.enable(enable & equalizer_enable),
.sample_in(sync_long_out),
.sample_in_strobe(sync_long_out_strobe),
.sample_in_strobe(sync_long_out_strobe && !(state==S_HT_SIGNAL && num_ofdm_symbol==6)),
.ht_next(ht_next),
.pkt_ht(pkt_ht),
.ht_smoothing(ht_smoothing),