2017-04-03 18:42:37 +00:00
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.. OpenOFDM documentation master file, created by
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sphinx-quickstart on Mon Apr 3 14:42:17 2017.
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You can adapt this file completely to your liking, but it should at least
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contain the root `toctree` directive.
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2017-04-21 17:42:20 +00:00
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|project|: Synthesizable, Modular Verilog Implementation of 802.11 OFDM Decoder
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===============================================================================
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|project| is a open source Verilog implementation of 802.11 OFDM decoder.
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Highlights are:
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- Supports 802.11a/g (all bit rates) and 802.11n (20MHz BW, MCS 0 - 7)
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- Modular design, easy to extend
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- Fully synthesizable, tested on USRP N210
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2017-04-03 18:42:37 +00:00
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.. toctree::
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:maxdepth: 2
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:caption: Contents:
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2017-04-21 17:42:20 +00:00
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overview
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2017-04-05 20:06:23 +00:00
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detection
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2017-04-03 19:48:25 +00:00
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freq_offset
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2017-04-07 20:48:34 +00:00
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sync_long
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2017-04-12 19:49:17 +00:00
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eq
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2017-04-14 14:59:40 +00:00
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decode
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2017-04-17 19:55:36 +00:00
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sig
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2017-04-05 20:06:23 +00:00
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setting
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verilog
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2017-04-25 19:19:32 +00:00
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usrp
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2017-04-03 19:48:25 +00:00
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