openofdm/verilog/coregen/deinter_lut.asy

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2017-04-14 20:29:33 +00:00
Version 4
SymbolType BLOCK
TEXT 32 32 LEFT 4 deinter_lut
RECTANGLE Normal 32 32 544 672
LINE Wide 0 80 32 80
PIN 0 80 LEFT 36
PINATTR PinName addra[10:0]
PINATTR Polarity IN
LINE Normal 0 272 32 272
PIN 0 272 LEFT 36
PINATTR PinName clka
PINATTR Polarity IN
LINE Wide 576 80 544 80
PIN 576 80 RIGHT 36
PINATTR PinName douta[21:0]
PINATTR Polarity OUT