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* modules/coreboot: add option to use coreboot 4.11 Port patches from coreboot 4.8.1 to 4.11: * 0000-measure-boot -> 0001 * 0010-cross-compiler-support All other patches for coreboot 4.8.1 have either already been integrated, or are for platforms which do not need to be migrated to coreboot 4.11 (they will move to 4.12 or newer). Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * patches/coreboot-4.11: Add Broadwell-DE platform patch Add a patch for FSP Broadwell-DE to make use of Heads' measured boot. Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * patches/coreboot-4.11: Add patch to read serial # from CBFS Will be used by multiple Librem boards. Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * patches/coreboot-4.11: add board support for Librem Server L1UM Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * Librem Server L1UM: add new board Add board config, coreboot config, kernel config files. Add conditional purism-blobs dependency to coreboot-4.11 module. Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * flash.sh: add special handling for librem_l1um board Add support for persisting PCIe config via PCHSTRP9 in flash descriptor. This is needed to support multiple variants of the L1UM server which use the same firmware but differ in PCIe lane configuration via the PCH straps configuration in the flash descriptor. Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * patches/coreboot-4.11: Add 'Use PRIxPTR to print uintptr_t' patch Cherry-picked from upstream coreboot (post-4.11), fixes compilation issue. Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * CircleCI: add target to build board librem_l1um Signed-off-by: Matt DeVillier <matt.devillier@puri.sm>
48 lines
1.5 KiB
Diff
48 lines
1.5 KiB
Diff
From 06f2fcc0ffc1a903f304d8a3382f3a57163989a1 Mon Sep 17 00:00:00 2001
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From: Jacob Garber <jgarber1@ualberta.ca>
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Date: Mon, 4 Nov 2019 09:35:15 -0700
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Subject: [PATCH] cpu/x86/smm: Use PRIxPTR to print uintptr_t
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Since 'base' is a uintptr_t, it needs the PRIxPTR format specifier. This
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fixes a compilation error when targeting x86_64 or using Clang 9.0.0.
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Change-Id: Ib806e2b3cbb255ef208b361744ac4547b8ba262f
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Signed-off-by: Jacob Garber <jgarber1@ualberta.ca>
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Reviewed-on: https://review.coreboot.org/c/coreboot/+/36785
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Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
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---
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src/cpu/x86/smm/tseg_region.c | 5 +++--
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1 file changed, 3 insertions(+), 2 deletions(-)
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diff --git a/src/cpu/x86/smm/tseg_region.c b/src/cpu/x86/smm/tseg_region.c
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index a8b8bb7b9a..5b5c5729d5 100644
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--- a/src/cpu/x86/smm/tseg_region.c
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+++ b/src/cpu/x86/smm/tseg_region.c
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@@ -17,6 +17,7 @@
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#include <cpu/x86/smm.h>
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#include <stage_cache.h>
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#include <types.h>
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+#include <inttypes.h>
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/*
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* Subregions within SMM
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@@ -88,11 +89,11 @@ void smm_list_regions(void)
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return;
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printk(BIOS_DEBUG, "SMM Memory Map\n");
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- printk(BIOS_DEBUG, "SMRAM : 0x%zx 0x%zx\n", base, size);
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+ printk(BIOS_DEBUG, "SMRAM : 0x%" PRIxPTR " 0x%zx\n", base, size);
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for (i = 0; i < SMM_SUBREGION_NUM; i++) {
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if (smm_subregion(i, &base, &size))
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continue;
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- printk(BIOS_DEBUG, " Subregion %d: 0x%zx 0x%zx\n", i, base, size);
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+ printk(BIOS_DEBUG, " Subregion %d: 0x%" PRIxPTR " 0x%zx\n", i, base, size);
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}
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}
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--
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2.21.1
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