heads/config/coreboot-librem_l1um.config

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#
# Automatically generated file; DO NOT EDIT.
# coreboot configuration
#
#
# General setup
#
CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
# CONFIG_COMPILER_LLVM_CLANG is not set
# CONFIG_ANY_TOOLCHAIN is not set
# CONFIG_CCACHE is not set
# CONFIG_FMD_GENPARSER is not set
# CONFIG_UTIL_GENPARSER is not set
CONFIG_COMPRESS_RAMSTAGE=y
CONFIG_INCLUDE_CONFIG_FILE=y
CONFIG_COLLECT_TIMESTAMPS=y
# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
Add new board: Purism Librem Server L1UM (#858) * modules/coreboot: add option to use coreboot 4.11 Port patches from coreboot 4.8.1 to 4.11: * 0000-measure-boot -> 0001 * 0010-cross-compiler-support All other patches for coreboot 4.8.1 have either already been integrated, or are for platforms which do not need to be migrated to coreboot 4.11 (they will move to 4.12 or newer). Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * patches/coreboot-4.11: Add Broadwell-DE platform patch Add a patch for FSP Broadwell-DE to make use of Heads' measured boot. Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * patches/coreboot-4.11: Add patch to read serial # from CBFS Will be used by multiple Librem boards. Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * patches/coreboot-4.11: add board support for Librem Server L1UM Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * Librem Server L1UM: add new board Add board config, coreboot config, kernel config files. Add conditional purism-blobs dependency to coreboot-4.11 module. Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * flash.sh: add special handling for librem_l1um board Add support for persisting PCIe config via PCHSTRP9 in flash descriptor. This is needed to support multiple variants of the L1UM server which use the same firmware but differ in PCIe lane configuration via the PCH straps configuration in the flash descriptor. Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * patches/coreboot-4.11: Add 'Use PRIxPTR to print uintptr_t' patch Cherry-picked from upstream coreboot (post-4.11), fixes compilation issue. Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * CircleCI: add target to build board librem_l1um Signed-off-by: Matt DeVillier <matt.devillier@puri.sm>
2020-10-18 18:48:25 +00:00
CONFIG_USE_BLOBS=y
# CONFIG_USE_AMD_BLOBS is not set
# CONFIG_COVERAGE is not set
# CONFIG_UBSAN is not set
# CONFIG_NO_RELOCATABLE_RAMSTAGE is not set
CONFIG_RELOCATABLE_RAMSTAGE=y
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
Add new board: Purism Librem Server L1UM (#858) * modules/coreboot: add option to use coreboot 4.11 Port patches from coreboot 4.8.1 to 4.11: * 0000-measure-boot -> 0001 * 0010-cross-compiler-support All other patches for coreboot 4.8.1 have either already been integrated, or are for platforms which do not need to be migrated to coreboot 4.11 (they will move to 4.12 or newer). Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * patches/coreboot-4.11: Add Broadwell-DE platform patch Add a patch for FSP Broadwell-DE to make use of Heads' measured boot. Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * patches/coreboot-4.11: Add patch to read serial # from CBFS Will be used by multiple Librem boards. Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * patches/coreboot-4.11: add board support for Librem Server L1UM Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * Librem Server L1UM: add new board Add board config, coreboot config, kernel config files. Add conditional purism-blobs dependency to coreboot-4.11 module. Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * flash.sh: add special handling for librem_l1um board Add support for persisting PCIe config via PCHSTRP9 in flash descriptor. This is needed to support multiple variants of the L1UM server which use the same firmware but differ in PCIe lane configuration via the PCH straps configuration in the flash descriptor. Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * patches/coreboot-4.11: Add 'Use PRIxPTR to print uintptr_t' patch Cherry-picked from upstream coreboot (post-4.11), fixes compilation issue. Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * CircleCI: add target to build board librem_l1um Signed-off-by: Matt DeVillier <matt.devillier@puri.sm>
2020-10-18 18:48:25 +00:00
CONFIG_MEASURED_BOOT=y
#
# Mainboard
#
#
# Important: Run 'make distclean' before switching boards
#
# CONFIG_VENDOR_ADI is not set
# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_ADVANSUS is not set
# CONFIG_VENDOR_AMD is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
# CONFIG_VENDOR_ASUS is not set
# CONFIG_VENDOR_AVALUE is not set
# CONFIG_VENDOR_BAP is not set
# CONFIG_VENDOR_BIOSTAR is not set
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_COMPULAB is not set
# CONFIG_VENDOR_ELMEX is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_ESD is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GIZMOSPHERE is not set
# CONFIG_VENDOR_GOOGLE is not set
# CONFIG_VENDOR_HP is not set
# CONFIG_VENDOR_IBASE is not set
# CONFIG_VENDOR_IEI is not set
# CONFIG_VENDOR_INTEL is not set
# CONFIG_VENDOR_JETWAY is not set
# CONFIG_VENDOR_KONTRON is not set
# CONFIG_VENDOR_LENOVO is not set
# CONFIG_VENDOR_LIPPERT is not set
# CONFIG_VENDOR_MSI is not set
# CONFIG_VENDOR_OCP is not set
# CONFIG_VENDOR_OPENCELLULAR is not set
# CONFIG_VENDOR_PACKARDBELL is not set
# CONFIG_VENDOR_PCENGINES is not set
# CONFIG_VENDOR_PORTWELL is not set
Add new board: Purism Librem Server L1UM (#858) * modules/coreboot: add option to use coreboot 4.11 Port patches from coreboot 4.8.1 to 4.11: * 0000-measure-boot -> 0001 * 0010-cross-compiler-support All other patches for coreboot 4.8.1 have either already been integrated, or are for platforms which do not need to be migrated to coreboot 4.11 (they will move to 4.12 or newer). Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * patches/coreboot-4.11: Add Broadwell-DE platform patch Add a patch for FSP Broadwell-DE to make use of Heads' measured boot. Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * patches/coreboot-4.11: Add patch to read serial # from CBFS Will be used by multiple Librem boards. Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * patches/coreboot-4.11: add board support for Librem Server L1UM Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * Librem Server L1UM: add new board Add board config, coreboot config, kernel config files. Add conditional purism-blobs dependency to coreboot-4.11 module. Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * flash.sh: add special handling for librem_l1um board Add support for persisting PCIe config via PCHSTRP9 in flash descriptor. This is needed to support multiple variants of the L1UM server which use the same firmware but differ in PCIe lane configuration via the PCH straps configuration in the flash descriptor. Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * patches/coreboot-4.11: Add 'Use PRIxPTR to print uintptr_t' patch Cherry-picked from upstream coreboot (post-4.11), fixes compilation issue. Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * CircleCI: add target to build board librem_l1um Signed-off-by: Matt DeVillier <matt.devillier@puri.sm>
2020-10-18 18:48:25 +00:00
CONFIG_VENDOR_PURISM=y
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
# CONFIG_VENDOR_SAPPHIRE is not set
# CONFIG_VENDOR_SCALEWAY is not set
# CONFIG_VENDOR_SIEMENS is not set
# CONFIG_VENDOR_SIFIVE is not set
# CONFIG_VENDOR_SUPERMICRO is not set
# CONFIG_VENDOR_TI is not set
# CONFIG_VENDOR_TYAN is not set
# CONFIG_VENDOR_UP is not set
# CONFIG_VENDOR_VIA is not set
CONFIG_BOARD_SPECIFIC_OPTIONS=y
CONFIG_MAINBOARD_DIR="purism/librem_l1um"
CONFIG_MAINBOARD_PART_NUMBER="LIBREM_L1UM"
CONFIG_MAX_CPUS=32
CONFIG_FSP_FILE="3rdparty/fsp/BroadwellDEFspBinPkg/FspBin/BROADWELLDE_FSP.bin"
Add new board: Purism Librem Server L1UM (#858) * modules/coreboot: add option to use coreboot 4.11 Port patches from coreboot 4.8.1 to 4.11: * 0000-measure-boot -> 0001 * 0010-cross-compiler-support All other patches for coreboot 4.8.1 have either already been integrated, or are for platforms which do not need to be migrated to coreboot 4.11 (they will move to 4.12 or newer). Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * patches/coreboot-4.11: Add Broadwell-DE platform patch Add a patch for FSP Broadwell-DE to make use of Heads' measured boot. Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * patches/coreboot-4.11: Add patch to read serial # from CBFS Will be used by multiple Librem boards. Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * patches/coreboot-4.11: add board support for Librem Server L1UM Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * Librem Server L1UM: add new board Add board config, coreboot config, kernel config files. Add conditional purism-blobs dependency to coreboot-4.11 module. Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * flash.sh: add special handling for librem_l1um board Add support for persisting PCIe config via PCHSTRP9 in flash descriptor. This is needed to support multiple variants of the L1UM server which use the same firmware but differ in PCIe lane configuration via the PCH straps configuration in the flash descriptor. Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * patches/coreboot-4.11: Add 'Use PRIxPTR to print uintptr_t' patch Cherry-picked from upstream coreboot (post-4.11), fixes compilation issue. Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * CircleCI: add target to build board librem_l1um Signed-off-by: Matt DeVillier <matt.devillier@puri.sm>
2020-10-18 18:48:25 +00:00
CONFIG_CBFS_SIZE=0xC00000
CONFIG_ENABLE_FSP_FAST_BOOT=y
CONFIG_VIRTUAL_ROM_SIZE=0x1000000
CONFIG_MAINBOARD_VENDOR="Purism"
CONFIG_IRQ_SLOT_COUNT=18
# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
CONFIG_DIMM_SPD_SIZE=512
# CONFIG_VGA_BIOS is not set
CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
CONFIG_C_ENV_BOOTBLOCK_SIZE=0x10000
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Purism"
CONFIG_DEVICETREE="devicetree.cb"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_DCACHE_RAM_BASE=0xfe100000
CONFIG_DCACHE_RAM_SIZE=0x8000
CONFIG_MAX_REBOOT_CNT=3
CONFIG_OVERRIDE_DEVICETREE=""
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
CONFIG_FMDFILE=""
# CONFIG_VBOOT is not set
CONFIG_MMCONF_BASE_ADDRESS=0x80000000
CONFIG_HAVE_INTEL_FIRMWARE=y
CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
CONFIG_FSP_LOC=0xffeb0000
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_TPM_INIT=y
# CONFIG_DRIVERS_INTEL_WIFI is not set
CONFIG_DRIVERS_UART_8250IO=y
CONFIG_DIMM_MAX=4
CONFIG_TPM_PIRQ=0x0
Add new board: Purism Librem Server L1UM (#858) * modules/coreboot: add option to use coreboot 4.11 Port patches from coreboot 4.8.1 to 4.11: * 0000-measure-boot -> 0001 * 0010-cross-compiler-support All other patches for coreboot 4.8.1 have either already been integrated, or are for platforms which do not need to be migrated to coreboot 4.11 (they will move to 4.12 or newer). Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * patches/coreboot-4.11: Add Broadwell-DE platform patch Add a patch for FSP Broadwell-DE to make use of Heads' measured boot. Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * patches/coreboot-4.11: Add patch to read serial # from CBFS Will be used by multiple Librem boards. Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * patches/coreboot-4.11: add board support for Librem Server L1UM Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * Librem Server L1UM: add new board Add board config, coreboot config, kernel config files. Add conditional purism-blobs dependency to coreboot-4.11 module. Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * flash.sh: add special handling for librem_l1um board Add support for persisting PCIe config via PCHSTRP9 in flash descriptor. This is needed to support multiple variants of the L1UM server which use the same firmware but differ in PCIe lane configuration via the PCH straps configuration in the flash descriptor. Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * patches/coreboot-4.11: Add 'Use PRIxPTR to print uintptr_t' patch Cherry-picked from upstream coreboot (post-4.11), fixes compilation issue. Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * CircleCI: add target to build board librem_l1um Signed-off-by: Matt DeVillier <matt.devillier@puri.sm>
2020-10-18 18:48:25 +00:00
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Librem Server L1UM"
CONFIG_IFD_BIN_PATH="3rdparty/purism-blobs/mainboard/purism/librem_l1um/flashdescriptor.bin"
CONFIG_ME_BIN_PATH="3rdparty/purism-blobs/mainboard/purism/librem_l1um/me.bin"
CONFIG_HAVE_IFD_BIN=y
CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
# CONFIG_INTEGRATED_UART is not set
CONFIG_IPMI_KCS_REGISTER_SPACING=1
CONFIG_MAINBOARD_VERSION="1.0"
# CONFIG_DRIVERS_PS2_KEYBOARD is not set
# CONFIG_BOARD_PURISM_LIBREM13_V1 is not set
# CONFIG_BOARD_PURISM_LIBREM15_V2 is not set
Add new board: Purism Librem Server L1UM (#858) * modules/coreboot: add option to use coreboot 4.11 Port patches from coreboot 4.8.1 to 4.11: * 0000-measure-boot -> 0001 * 0010-cross-compiler-support All other patches for coreboot 4.8.1 have either already been integrated, or are for platforms which do not need to be migrated to coreboot 4.11 (they will move to 4.12 or newer). Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * patches/coreboot-4.11: Add Broadwell-DE platform patch Add a patch for FSP Broadwell-DE to make use of Heads' measured boot. Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * patches/coreboot-4.11: Add patch to read serial # from CBFS Will be used by multiple Librem boards. Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * patches/coreboot-4.11: add board support for Librem Server L1UM Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * Librem Server L1UM: add new board Add board config, coreboot config, kernel config files. Add conditional purism-blobs dependency to coreboot-4.11 module. Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * flash.sh: add special handling for librem_l1um board Add support for persisting PCIe config via PCHSTRP9 in flash descriptor. This is needed to support multiple variants of the L1UM server which use the same firmware but differ in PCIe lane configuration via the PCH straps configuration in the flash descriptor. Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * patches/coreboot-4.11: Add 'Use PRIxPTR to print uintptr_t' patch Cherry-picked from upstream coreboot (post-4.11), fixes compilation issue. Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * CircleCI: add target to build board librem_l1um Signed-off-by: Matt DeVillier <matt.devillier@puri.sm>
2020-10-18 18:48:25 +00:00
CONFIG_BOARD_PURISM_LIBREM_L1UM=y
# CONFIG_BOARD_PURISM_LIBREM13_V2 is not set
# CONFIG_BOARD_PURISM_LIBREM15_V3 is not set
# CONFIG_BOARD_PURISM_LIBREM13_V4 is not set
# CONFIG_BOARD_PURISM_LIBREM15_V4 is not set
# CONFIG_BOARD_PURISM_BASEBOARD_LIBREM_BDW is not set
# CONFIG_PCIEXP_L1_SUB_STATE is not set
CONFIG_NO_POST=y
# CONFIG_BOARD_PURISM_BASEBOARD_LIBREM_SKL is not set
CONFIG_SMBIOS_ENCLOSURE_TYPE=0x03
CONFIG_HEAP_SIZE=0x100000
CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
CONFIG_LINUX_COMMAND_LINE="quiet loglevel=3"
CONFIG_BOARD_ROMSIZE_KB_16384=y
# CONFIG_COREBOOT_ROMSIZE_KB_64 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_128 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
CONFIG_COREBOOT_ROMSIZE_KB_16384=y
# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
CONFIG_COREBOOT_ROMSIZE_KB=16384
CONFIG_ROM_SIZE=0x1000000
# CONFIG_SYSTEM_TYPE_LAPTOP is not set
# CONFIG_SYSTEM_TYPE_TABLET is not set
# CONFIG_SYSTEM_TYPE_DETACHABLE is not set
# CONFIG_SYSTEM_TYPE_CONVERTIBLE is not set
# CONFIG_CBFS_AUTOGEN_ATTRIBUTES is not set
#
# Chipset
#
#
# SoC
#
CONFIG_CPU_SPECIFIC_OPTIONS=y
CONFIG_HAVE_BOOTBLOCK=y
CONFIG_CPU_ADDR_BITS=36
CONFIG_SERIRQ_CONTINUOUS_MODE=y
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x800
CONFIG_ACPI_CPU_STRING="\\_PR.CP%02d"
# CONFIG_SOC_CAVIUM_CN81XX is not set
CONFIG_ARCH_ARMV8_EXTENSION=0
CONFIG_STACK_SIZE=0x1000
# CONFIG_SOC_CAVIUM_COMMON is not set
CONFIG_BOOTBLOCK_CPU_INIT="soc/intel/fsp_broadwell_de/bootblock/bootblock.c"
# CONFIG_SOC_INTEL_GLK is not set
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_FSP_HEADER_PATH="$(top)/3rdparty/fsp/BroadwellDEFspBinPkg/include/"
# CONFIG_PCIEXP_ASPM is not set
Add new board: Purism Librem Server L1UM (#858) * modules/coreboot: add option to use coreboot 4.11 Port patches from coreboot 4.8.1 to 4.11: * 0000-measure-boot -> 0001 * 0010-cross-compiler-support All other patches for coreboot 4.8.1 have either already been integrated, or are for platforms which do not need to be migrated to coreboot 4.11 (they will move to 4.12 or newer). Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * patches/coreboot-4.11: Add Broadwell-DE platform patch Add a patch for FSP Broadwell-DE to make use of Heads' measured boot. Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * patches/coreboot-4.11: Add patch to read serial # from CBFS Will be used by multiple Librem boards. Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * patches/coreboot-4.11: add board support for Librem Server L1UM Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * Librem Server L1UM: add new board Add board config, coreboot config, kernel config files. Add conditional purism-blobs dependency to coreboot-4.11 module. Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * flash.sh: add special handling for librem_l1um board Add support for persisting PCIe config via PCHSTRP9 in flash descriptor. This is needed to support multiple variants of the L1UM server which use the same firmware but differ in PCIe lane configuration via the PCH straps configuration in the flash descriptor. Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * patches/coreboot-4.11: Add 'Use PRIxPTR to print uintptr_t' patch Cherry-picked from upstream coreboot (post-4.11), fixes compilation issue. Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * CircleCI: add target to build board librem_l1um Signed-off-by: Matt DeVillier <matt.devillier@puri.sm>
2020-10-18 18:48:25 +00:00
CONFIG_PCIEXP_COMMON_CLOCK=y
# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_IED_REGION_SIZE=0x400000
CONFIG_SOC_INTEL_FSP_BROADWELL_DE=y
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_BROADWELL_DE_FSP_SPECIFIC_OPTIONS=y
CONFIG_FSP_SRC_PATH="$(top)/3rdparty/fsp/BroadwellDEFspBinPkg/include/fspsupport.c"
# CONFIG_FSP_MEMORY_DOWN is not set
CONFIG_FSP_HYPERTHREADING=y
Add new board: Purism Librem Server L1UM (#858) * modules/coreboot: add option to use coreboot 4.11 Port patches from coreboot 4.8.1 to 4.11: * 0000-measure-boot -> 0001 * 0010-cross-compiler-support All other patches for coreboot 4.8.1 have either already been integrated, or are for platforms which do not need to be migrated to coreboot 4.11 (they will move to 4.12 or newer). Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * patches/coreboot-4.11: Add Broadwell-DE platform patch Add a patch for FSP Broadwell-DE to make use of Heads' measured boot. Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * patches/coreboot-4.11: Add patch to read serial # from CBFS Will be used by multiple Librem boards. Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * patches/coreboot-4.11: add board support for Librem Server L1UM Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * Librem Server L1UM: add new board Add board config, coreboot config, kernel config files. Add conditional purism-blobs dependency to coreboot-4.11 module. Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * flash.sh: add special handling for librem_l1um board Add support for persisting PCIe config via PCHSTRP9 in flash descriptor. This is needed to support multiple variants of the L1UM server which use the same firmware but differ in PCIe lane configuration via the PCH straps configuration in the flash descriptor. Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * patches/coreboot-4.11: Add 'Use PRIxPTR to print uintptr_t' patch Cherry-picked from upstream coreboot (post-4.11), fixes compilation issue. Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * CircleCI: add target to build board librem_l1um Signed-off-by: Matt DeVillier <matt.devillier@puri.sm>
2020-10-18 18:48:25 +00:00
CONFIG_FSP_EHCI1_ENABLE=y
CONFIG_FSP_EHCI2_ENABLE=y
CONFIG_FSP_DEBUG_LEVEL=0
CONFIG_UART_PCI_ADDR=0x0
CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=4
CONFIG_SOC_INTEL_COMMON=y
#
# Intel SoC Common Code
#
CONFIG_SOC_INTEL_COMMON_BLOCK=y
# CONFIG_SOC_INTEL_COMMON_BLOCK_CPU is not set
# CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_MPINIT is not set
# CONFIG_SOC_INTEL_COMMON_BLOCK_CAR is not set
# CONFIG_INTEL_CAR_NEM is not set
# CONFIG_INTEL_CAR_CQOS is not set
# CONFIG_INTEL_CAR_NEM_ENHANCED is not set
# CONFIG_USE_INTEL_FSP_MP_INIT is not set
# CONFIG_SOC_INTEL_COMMON_BLOCK_CSE is not set
# CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_VERSION_2 is not set
CONFIG_SOC_INTEL_COMMON_BLOCK_IMC=y
# CONFIG_PMC_INVALID_READ_AFTER_WRITE is not set
# CONFIG_SOC_INTEL_COMMON_EARLY_MMC_WAKE is not set
# CONFIG_SOC_INTEL_COMMON_MMC_OVERRIDE is not set
# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX is not set
# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_PRMRR_SIZE_MAX is not set
# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_PRMRR_SIZE_256MB is not set
# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_PRMRR_SIZE_128MB is not set
# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_PRMRR_SIZE_64MB is not set
# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_PRMRR_SIZE_32MB is not set
# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_PRMRR_SIZE_1MB is not set
CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_PRMRR_DISABLED=y
# CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_ESPI_DISABLE is not set
CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_S5_DELAY_MS=0
CONFIG_SA_PCIEX_LENGTH=0x10000000
# CONFIG_SA_ENABLE_IMR is not set
# CONFIG_SA_ENABLE_DPR is not set
# CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL is not set
# CONFIG_USE_LEGACY_8254_TIMER is not set
#
# Intel SoC Common PCH Code
#
#
# Intel SoC Common coreboot stages
#
# CONFIG_SOC_INTEL_COMMON_RESET is not set
# CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE is not set
# CONFIG_ACPI_CONSOLE is not set
# CONFIG_SOC_INTEL_COMMON_ACPI is not set
# CONFIG_SOC_INTEL_COMMON_NHLT is not set
# CONFIG_SOC_INTEL_DEBUG_CONSENT is not set
# CONFIG_SOC_MEDIATEK_MT8173 is not set
# CONFIG_SOC_MEDIATEK_MT8183 is not set
# CONFIG_SOC_NVIDIA_TEGRA124 is not set
# CONFIG_SOC_NVIDIA_TEGRA210 is not set
# CONFIG_SOC_QUALCOMM_COMMON is not set
# CONFIG_SOC_QC_IPQ40XX is not set
# CONFIG_SOC_QC_IPQ806X is not set
# CONFIG_SOC_QUALCOMM_QCS405 is not set
# CONFIG_SOC_QUALCOMM_SC7180 is not set
# CONFIG_SOC_QUALCOMM_SDM845 is not set
# CONFIG_SOC_ROCKCHIP_RK3288 is not set
# CONFIG_SOC_ROCKCHIP_RK3399 is not set
# CONFIG_CPU_SAMSUNG_EXYNOS5250 is not set
# CONFIG_CPU_SAMSUNG_EXYNOS5420 is not set
# CONFIG_SOC_UCB_RISCV is not set
#
# CPU
#
CONFIG_XIP_ROM_SIZE=0x10000
CONFIG_NUM_IPI_STARTS=2
# CONFIG_CPU_AMD_AGESA is not set
CONFIG_ENABLE_MRC_CACHE=y
# CONFIG_CPU_AMD_PI is not set
# CONFIG_CPU_ARMLTD_CORTEX_A9 is not set
CONFIG_SSE2=y
CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
# CONFIG_CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED is not set
# CONFIG_CPU_TI_AM335X is not set
# CONFIG_PARALLEL_CPU_INIT is not set
CONFIG_PARALLEL_MP=y
# CONFIG_PARALLEL_MP_AP_WORK is not set
# CONFIG_UDELAY_LAPIC is not set
CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
# CONFIG_TSC_SYNC_LFENCE is not set
# CONFIG_TSC_SYNC_MFENCE is not set
# CONFIG_NO_FIXED_XIP_ROM_SIZE is not set
CONFIG_LOGICAL_CPUS=y
CONFIG_HAVE_SMI_HANDLER=y
# CONFIG_NO_SMM is not set
# CONFIG_SMM_ASEG is not set
CONFIG_SMM_TSEG=y
CONFIG_SMM_MODULE_HEAP_SIZE=0x4000
CONFIG_SMM_STUB_STACK_SIZE=0x400
# CONFIG_SMM_LAPIC_REMAP_MITIGATION is not set
# CONFIG_SERIALIZED_SMM_INITIALIZATION is not set
# CONFIG_X86_AMD_FIXED_MTRRS is not set
# CONFIG_X86_AMD_INIT_SIPI is not set
# CONFIG_MIRROR_PAYLOAD_TO_RAM_BEFORE_LOADING is not set
# CONFIG_SOC_SETS_MSRS is not set
CONFIG_CAR_GLOBAL_MIGRATION=y
CONFIG_SMP=y
CONFIG_SSE=y
CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
# CONFIG_USES_MICROCODE_HEADER_FILES is not set
CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
# CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS is not set
Add new board: Purism Librem Server L1UM (#858) * modules/coreboot: add option to use coreboot 4.11 Port patches from coreboot 4.8.1 to 4.11: * 0000-measure-boot -> 0001 * 0010-cross-compiler-support All other patches for coreboot 4.8.1 have either already been integrated, or are for platforms which do not need to be migrated to coreboot 4.11 (they will move to 4.12 or newer). Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * patches/coreboot-4.11: Add Broadwell-DE platform patch Add a patch for FSP Broadwell-DE to make use of Heads' measured boot. Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * patches/coreboot-4.11: Add patch to read serial # from CBFS Will be used by multiple Librem boards. Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * patches/coreboot-4.11: add board support for Librem Server L1UM Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * Librem Server L1UM: add new board Add board config, coreboot config, kernel config files. Add conditional purism-blobs dependency to coreboot-4.11 module. Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * flash.sh: add special handling for librem_l1um board Add support for persisting PCIe config via PCHSTRP9 in flash descriptor. This is needed to support multiple variants of the L1UM server which use the same firmware but differ in PCIe lane configuration via the PCH straps configuration in the flash descriptor. Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * patches/coreboot-4.11: Add 'Use PRIxPTR to print uintptr_t' patch Cherry-picked from upstream coreboot (post-4.11), fixes compilation issue. Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * CircleCI: add target to build board librem_l1um Signed-off-by: Matt DeVillier <matt.devillier@puri.sm>
2020-10-18 18:48:25 +00:00
CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y
# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
Add new board: Purism Librem Server L1UM (#858) * modules/coreboot: add option to use coreboot 4.11 Port patches from coreboot 4.8.1 to 4.11: * 0000-measure-boot -> 0001 * 0010-cross-compiler-support All other patches for coreboot 4.8.1 have either already been integrated, or are for platforms which do not need to be migrated to coreboot 4.11 (they will move to 4.12 or newer). Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * patches/coreboot-4.11: Add Broadwell-DE platform patch Add a patch for FSP Broadwell-DE to make use of Heads' measured boot. Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * patches/coreboot-4.11: Add patch to read serial # from CBFS Will be used by multiple Librem boards. Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * patches/coreboot-4.11: add board support for Librem Server L1UM Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * Librem Server L1UM: add new board Add board config, coreboot config, kernel config files. Add conditional purism-blobs dependency to coreboot-4.11 module. Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * flash.sh: add special handling for librem_l1um board Add support for persisting PCIe config via PCHSTRP9 in flash descriptor. This is needed to support multiple variants of the L1UM server which use the same firmware but differ in PCIe lane configuration via the PCH straps configuration in the flash descriptor. Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * patches/coreboot-4.11: Add 'Use PRIxPTR to print uintptr_t' patch Cherry-picked from upstream coreboot (post-4.11), fixes compilation issue. Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * CircleCI: add target to build board librem_l1um Signed-off-by: Matt DeVillier <matt.devillier@puri.sm>
2020-10-18 18:48:25 +00:00
CONFIG_CPU_UCODE_BINARIES="3rdparty/purism-blobs/mainboard/purism/librem_l1um/cpu_microcode_blob.bin"
#
# Northbridge
#
# CONFIG_NORTHBRIDGE_AMD_AGESA is not set
# CONFIG_NORTHBRIDGE_AMD_PI is not set
#
# Southbridge
#
# CONFIG_AMD_SB_CIMX is not set
# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB800 is not set
# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB900 is not set
CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE is not set
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO is not set
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS is not set
CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN is not set
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ is not set
# CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN is not set
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM is not set
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG is not set
CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
#
# Super I/O
#
CONFIG_SUPERIO_ASPEED_AST2400=y
CONFIG_SUPERIO_ASPEED_COMMON_PRE_RAM=y
# CONFIG_SUPERIO_ASPEED_HAS_UART_DELAY_WORKAROUND is not set
# CONFIG_SUPERIO_FINTEK_FAN_CONTROL is not set
#
# Embedded Controllers
#
# CONFIG_EC_GOOGLE_WILCO is not set
#
# Intel Firmware
#
Add new board: Purism Librem Server L1UM (#858) * modules/coreboot: add option to use coreboot 4.11 Port patches from coreboot 4.8.1 to 4.11: * 0000-measure-boot -> 0001 * 0010-cross-compiler-support All other patches for coreboot 4.8.1 have either already been integrated, or are for platforms which do not need to be migrated to coreboot 4.11 (they will move to 4.12 or newer). Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * patches/coreboot-4.11: Add Broadwell-DE platform patch Add a patch for FSP Broadwell-DE to make use of Heads' measured boot. Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * patches/coreboot-4.11: Add patch to read serial # from CBFS Will be used by multiple Librem boards. Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * patches/coreboot-4.11: add board support for Librem Server L1UM Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * Librem Server L1UM: add new board Add board config, coreboot config, kernel config files. Add conditional purism-blobs dependency to coreboot-4.11 module. Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * flash.sh: add special handling for librem_l1um board Add support for persisting PCIe config via PCHSTRP9 in flash descriptor. This is needed to support multiple variants of the L1UM server which use the same firmware but differ in PCIe lane configuration via the PCH straps configuration in the flash descriptor. Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * patches/coreboot-4.11: Add 'Use PRIxPTR to print uintptr_t' patch Cherry-picked from upstream coreboot (post-4.11), fixes compilation issue. Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * CircleCI: add target to build board librem_l1um Signed-off-by: Matt DeVillier <matt.devillier@puri.sm>
2020-10-18 18:48:25 +00:00
CONFIG_HAVE_ME_BIN=y
CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
# CONFIG_HAVE_GBE_BIN is not set
# CONFIG_MAINBOARD_USES_IFD_EC_REGION is not set
# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
CONFIG_UNLOCK_FLASH_REGIONS=y
# CONFIG_CAVIUM_BDK is not set
# CONFIG_MAINBOARD_HAS_CHROMEOS is not set
# CONFIG_GOOGLE_SMBIOS_MAINBOARD_VERSION is not set
# CONFIG_UEFI_2_4_BINDING is not set
# CONFIG_UDK_2015_BINDING is not set
# CONFIG_UDK_2017_BINDING is not set
# CONFIG_USE_SIEMENS_HWILIB is not set
# CONFIG_ARM_LPAE is not set
CONFIG_ARCH_X86=y
CONFIG_ARCH_BOOTBLOCK_X86_32=y
CONFIG_ARCH_VERSTAGE_X86_32=y
CONFIG_ARCH_ROMSTAGE_X86_32=y
# CONFIG_ARCH_POSTCAR_X86_32 is not set
CONFIG_ARCH_RAMSTAGE_X86_32=y
# CONFIG_ARCH_BOOTBLOCK_X86_64 is not set
# CONFIG_ARCH_VERSTAGE_X86_64 is not set
# CONFIG_ARCH_ROMSTAGE_X86_64 is not set
# CONFIG_ARCH_POSTCAR_X86_64 is not set
# CONFIG_ARCH_RAMSTAGE_X86_64 is not set
# CONFIG_USE_MARCH_586 is not set
# CONFIG_AP_IN_SIPI_WAIT is not set
# CONFIG_SIPI_VECTOR_IN_ROM is not set
CONFIG_RAMBASE=0xe00000
CONFIG_RAMTOP=0x1000000
# CONFIG_CBMEM_TOP_BACKUP is not set
CONFIG_PC80_SYSTEM=y
# CONFIG_BOOTBLOCK_DEBUG_SPINLOOP is not set
CONFIG_IOAPIC_INTERRUPTS_ON_FSB=y
# CONFIG_IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS is not set
# CONFIG_HPET_ADDRESS_OVERRIDE is not set
CONFIG_HPET_ADDRESS=0xfed00000
CONFIG_ID_SECTION_OFFSET=0x80
# CONFIG_VERSTAGE_DEBUG_SPINLOOP is not set
# CONFIG_ROMSTAGE_DEBUG_SPINLOOP is not set
CONFIG_BOOTBLOCK_SIMPLE=y
# CONFIG_BOOTBLOCK_NORMAL is not set
CONFIG_BOOTBLOCK_SOURCE="bootblock_simple.c"
CONFIG_ACPI_HAVE_PCAT_8259=y
# CONFIG_COLLECT_TIMESTAMPS_NO_TSC is not set
CONFIG_COLLECT_TIMESTAMPS_TSC=y
# CONFIG_PAGING_IN_CACHE_AS_RAM is not set
# CONFIG_IDT_IN_EVERY_STAGE is not set
CONFIG_HAVE_CF9_RESET=y
# CONFIG_PIRQ_ROUTE is not set
#
# Devices
#
# CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT is not set
# CONFIG_MAINBOARD_HAS_LIBGFXINIT is not set
# CONFIG_VGA_ROM_RUN is not set
Add new board: Purism Librem Server L1UM (#858) * modules/coreboot: add option to use coreboot 4.11 Port patches from coreboot 4.8.1 to 4.11: * 0000-measure-boot -> 0001 * 0010-cross-compiler-support All other patches for coreboot 4.8.1 have either already been integrated, or are for platforms which do not need to be migrated to coreboot 4.11 (they will move to 4.12 or newer). Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * patches/coreboot-4.11: Add Broadwell-DE platform patch Add a patch for FSP Broadwell-DE to make use of Heads' measured boot. Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * patches/coreboot-4.11: Add patch to read serial # from CBFS Will be used by multiple Librem boards. Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * patches/coreboot-4.11: add board support for Librem Server L1UM Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * Librem Server L1UM: add new board Add board config, coreboot config, kernel config files. Add conditional purism-blobs dependency to coreboot-4.11 module. Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * flash.sh: add special handling for librem_l1um board Add support for persisting PCIe config via PCHSTRP9 in flash descriptor. This is needed to support multiple variants of the L1UM server which use the same firmware but differ in PCIe lane configuration via the PCH straps configuration in the flash descriptor. Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * patches/coreboot-4.11: Add 'Use PRIxPTR to print uintptr_t' patch Cherry-picked from upstream coreboot (post-4.11), fixes compilation issue. Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * CircleCI: add target to build board librem_l1um Signed-off-by: Matt DeVillier <matt.devillier@puri.sm>
2020-10-18 18:48:25 +00:00
CONFIG_NO_GFX_INIT=y
# CONFIG_MULTIPLE_VGA_ADAPTERS is not set
# CONFIG_SMBUS_HAS_AUX_CHANNELS is not set
CONFIG_PCI=y
# CONFIG_NO_MMCONF_SUPPORT is not set
CONFIG_MMCONF_SUPPORT=y
# CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT is not set
CONFIG_PCIX_PLUGIN_SUPPORT=y
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
# CONFIG_AZALIA_PLUGIN_SUPPORT is not set
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
# CONFIG_EARLY_PCI_BRIDGE is not set
# CONFIG_INTEL_GMA_ADD_VBT is not set
# CONFIG_SOFTWARE_I2C is not set
#
# Generic Drivers
#
# CONFIG_DRIVERS_AS3722_RTC is not set
CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
# CONFIG_MAINBOARD_HAS_CRB_TPM is not set
# CONFIG_ELOG is not set
# CONFIG_GIC is not set
CONFIG_IPMI_KCS=y
# CONFIG_DRIVERS_LENOVO_WACOM is not set
CONFIG_CACHE_MRC_SETTINGS=y
# CONFIG_MRC_SETTINGS_PROTECT is not set
# CONFIG_HAS_RECOVERY_MRC_CACHE is not set
# CONFIG_MRC_CLEAR_NORMAL_CACHE_ON_RECOVERY_RETRAIN is not set
# CONFIG_MRC_SETTINGS_VARIABLE_DATA is not set
# CONFIG_MRC_WRITE_NV_LATE is not set
# CONFIG_RT8168_GET_MAC_FROM_VPD is not set
# CONFIG_RT8168_SET_LED_MODE is not set
# CONFIG_SMMSTORE is not set
# CONFIG_SMMSTORE_IN_CBFS is not set
CONFIG_SPI_FLASH=y
# CONFIG_SPI_SDCARD is not set
CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
# CONFIG_SPI_FLASH_NO_FAST_READ is not set
CONFIG_SPI_FLASH_ADESTO=y
CONFIG_SPI_FLASH_AMIC=y
CONFIG_SPI_FLASH_ATMEL=y
CONFIG_SPI_FLASH_EON=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_SST=y
CONFIG_SPI_FLASH_STMICRO=y
# CONFIG_SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B is not set
# CONFIG_SPI_FLASH_HAS_VOLATILE_GROUP is not set
# CONFIG_HAVE_SPI_CONSOLE_SUPPORT is not set
CONFIG_DRIVERS_UART=y
# CONFIG_DRIVERS_UART_8250IO_SKIP_INIT is not set
# CONFIG_NO_UART_ON_SUPERIO is not set
# CONFIG_UART_OVERRIDE_INPUT_CLOCK_DIVIDER is not set
# CONFIG_UART_OVERRIDE_REFCLK is not set
# CONFIG_DRIVERS_UART_8250MEM is not set
# CONFIG_DRIVERS_UART_8250MEM_32 is not set
# CONFIG_HAVE_UART_SPECIAL is not set
# CONFIG_DRIVERS_UART_OXPCIE is not set
# CONFIG_DRIVERS_UART_PL011 is not set
# CONFIG_UART_USE_REFCLK_AS_INPUT_CLOCK is not set
# CONFIG_HAVE_USBDEBUG is not set
# CONFIG_HAVE_USBDEBUG_OPTIONS is not set
# CONFIG_VPD is not set
# CONFIG_DRIVERS_GENERIC_WIFI is not set
# CONFIG_DRIVERS_AMD_PI is not set
Add new board: Purism Librem Server L1UM (#858) * modules/coreboot: add option to use coreboot 4.11 Port patches from coreboot 4.8.1 to 4.11: * 0000-measure-boot -> 0001 * 0010-cross-compiler-support All other patches for coreboot 4.8.1 have either already been integrated, or are for platforms which do not need to be migrated to coreboot 4.11 (they will move to 4.12 or newer). Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * patches/coreboot-4.11: Add Broadwell-DE platform patch Add a patch for FSP Broadwell-DE to make use of Heads' measured boot. Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * patches/coreboot-4.11: Add patch to read serial # from CBFS Will be used by multiple Librem boards. Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * patches/coreboot-4.11: add board support for Librem Server L1UM Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * Librem Server L1UM: add new board Add board config, coreboot config, kernel config files. Add conditional purism-blobs dependency to coreboot-4.11 module. Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * flash.sh: add special handling for librem_l1um board Add support for persisting PCIe config via PCHSTRP9 in flash descriptor. This is needed to support multiple variants of the L1UM server which use the same firmware but differ in PCIe lane configuration via the PCH straps configuration in the flash descriptor. Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * patches/coreboot-4.11: Add 'Use PRIxPTR to print uintptr_t' patch Cherry-picked from upstream coreboot (post-4.11), fixes compilation issue. Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * CircleCI: add target to build board librem_l1um Signed-off-by: Matt DeVillier <matt.devillier@puri.sm>
2020-10-18 18:48:25 +00:00
CONFIG_DRIVERS_GENERIC_CBFS_SERIAL=y
# CONFIG_DRIVERS_I2C_MAX98373 is not set
# CONFIG_DRIVERS_I2C_MAX98927 is not set
# CONFIG_DRIVERS_I2C_PCA9538 is not set
# CONFIG_DRIVERS_I2C_PCF8523 is not set
# CONFIG_DRIVERS_I2C_PTN3460 is not set
# CONFIG_DRIVERS_I2C_RT1011 is not set
# CONFIG_DRIVERS_I2C_RT5663 is not set
# CONFIG_DRIVERS_I2C_RTD2132 is not set
# CONFIG_DRIVERS_I2C_RX6110SA is not set
# CONFIG_DRIVERS_I2C_SX9310 is not set
# CONFIG_MAINBOARD_HAS_I2C_TPM_ATMEL is not set
# CONFIG_MAINBOARD_HAS_I2C_TPM_CR50 is not set
# CONFIG_MAINBOARD_HAS_I2C_TPM_GENERIC is not set
CONFIG_PLATFORM_USES_FSP1_0=y
#
# Intel FSP
#
CONFIG_HAVE_FSP_BIN=y
CONFIG_MRC_CACHE_FMAP=y
CONFIG_USE_GENERIC_FSP_CAR_INC=y
CONFIG_FSP_USES_UPD=y
# CONFIG_PLATFORM_USES_FSP2_0 is not set
# CONFIG_PLATFORM_USES_FSP2_1 is not set
# CONFIG_INTEL_DDI is not set
# CONFIG_INTEL_EDID is not set
# CONFIG_INTEL_INT15 is not set
# CONFIG_INTEL_GMA_ACPI is not set
# CONFIG_INTEL_GMA_SSC_ALTERNATE_REF is not set
# CONFIG_INTEL_GMA_SWSMISCI is not set
# CONFIG_DRIVER_INTEL_I210 is not set
# CONFIG_DRIVERS_INTEL_MIPI_CAMERA is not set
# CONFIG_HAVE_INTEL_PTT is not set
# CONFIG_DRIVERS_LENOVO_HYBRID_GRAPHICS is not set
# CONFIG_DRIVER_MAXIM_MAX77686 is not set
# CONFIG_DRIVER_PARADE_PS8625 is not set
# CONFIG_DRIVER_PARADE_PS8640 is not set
CONFIG_DRIVERS_MC146818=y
CONFIG_LPC_TPM=y
CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
CONFIG_MAINBOARD_HAS_LPC_TPM=y
# CONFIG_DRIVERS_RICOH_RCE822 is not set
# CONFIG_DRIVER_SIEMENS_NC_FPGA is not set
# CONFIG_NC_FPGA_NOTIFY_CB_READY is not set
# CONFIG_DRIVERS_SIL_3114 is not set
# CONFIG_MAINBOARD_HAS_SPI_TPM_CR50 is not set
# CONFIG_DRIVER_TI_TPS65090 is not set
# CONFIG_DRIVERS_TI_TPS65913 is not set
# CONFIG_DRIVERS_TI_TPS65913_RTC is not set
# CONFIG_DRIVERS_USB_ACPI is not set
# CONFIG_COMMONLIB_STORAGE is not set
#
# Security
#
#
# Verified Boot (vboot)
#
#
# Trusted Platform Module
#
CONFIG_TPM1=y
# CONFIG_USER_NO_TPM is not set
Add new board: Purism Librem Server L1UM (#858) * modules/coreboot: add option to use coreboot 4.11 Port patches from coreboot 4.8.1 to 4.11: * 0000-measure-boot -> 0001 * 0010-cross-compiler-support All other patches for coreboot 4.8.1 have either already been integrated, or are for platforms which do not need to be migrated to coreboot 4.11 (they will move to 4.12 or newer). Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * patches/coreboot-4.11: Add Broadwell-DE platform patch Add a patch for FSP Broadwell-DE to make use of Heads' measured boot. Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * patches/coreboot-4.11: Add patch to read serial # from CBFS Will be used by multiple Librem boards. Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * patches/coreboot-4.11: add board support for Librem Server L1UM Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * Librem Server L1UM: add new board Add board config, coreboot config, kernel config files. Add conditional purism-blobs dependency to coreboot-4.11 module. Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * flash.sh: add special handling for librem_l1um board Add support for persisting PCIe config via PCHSTRP9 in flash descriptor. This is needed to support multiple variants of the L1UM server which use the same firmware but differ in PCIe lane configuration via the PCH straps configuration in the flash descriptor. Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * patches/coreboot-4.11: Add 'Use PRIxPTR to print uintptr_t' patch Cherry-picked from upstream coreboot (post-4.11), fixes compilation issue. Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * CircleCI: add target to build board librem_l1um Signed-off-by: Matt DeVillier <matt.devillier@puri.sm>
2020-10-18 18:48:25 +00:00
CONFIG_USER_TPM1=y
# CONFIG_USER_TPM2 is not set
# CONFIG_TPM_DEACTIVATE is not set
# CONFIG_DEBUG_TPM is not set
# CONFIG_TPM_RDRESP_NEED_DELAY is not set
#
# Memory initialization
#
CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
# CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT is not set
# CONFIG_INTEL_TXT is not set
# CONFIG_ACPI_SATA_GENERATOR is not set
CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
# CONFIG_ACPI_AMD_HARDWARE_SLEEP_VALUES is not set
# CONFIG_BOOT_DEVICE_NOT_SPI_FLASH is not set
CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
# CONFIG_RTC is not set
#
# Console
#
CONFIG_SQUELCH_EARLY_SMP=y
# CONFIG_CONSOLE_SERIAL is not set
# CONFIG_SPKMODEM is not set
# CONFIG_CONSOLE_NE2K is not set
CONFIG_CONSOLE_CBMEM=y
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
# CONFIG_CONSOLE_SPI_FLASH is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
# CONFIG_NO_EARLY_BOOTBLOCK_POSTCODES is not set
CONFIG_HWBASE_DEBUG_CB=y
# CONFIG_HAVE_ACPI_RESUME is not set
# CONFIG_HAVE_ROMSTAGE_CONSOLE_SPINLOCK is not set
# CONFIG_HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK is not set
# CONFIG_HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK is not set
# CONFIG_NO_MONOTONIC_TIMER is not set
CONFIG_HAVE_MONOTONIC_TIMER=y
# CONFIG_TIMER_QUEUE is not set
# CONFIG_HAVE_OPTION_TABLE is not set
# CONFIG_PCI_IO_CFG_EXT is not set
CONFIG_IOAPIC=y
# CONFIG_USE_WATCHDOG_ON_BOOT is not set
# CONFIG_GFXUMA is not set
CONFIG_HAVE_ACPI_TABLES=y
# CONFIG_COMMON_FADT is not set
# CONFIG_ACPI_NHLT is not set
#
# System tables
#
# CONFIG_GENERATE_MP_TABLE is not set
# CONFIG_GENERATE_PIRQ_TABLE is not set
CONFIG_GENERATE_SMBIOS_TABLES=y
# CONFIG_SMBIOS_PROVIDED_BY_MOBO is not set
#
# Payload
#
# CONFIG_PAYLOAD_NONE is not set
# CONFIG_PAYLOAD_ELF is not set
# CONFIG_PAYLOAD_BAYOU is not set
# CONFIG_PAYLOAD_FILO is not set
# CONFIG_PAYLOAD_GRUB2 is not set
# CONFIG_PAYLOAD_LINUXBOOT is not set
# CONFIG_PAYLOAD_SEABIOS is not set
# CONFIG_PAYLOAD_UBOOT is not set
# CONFIG_PAYLOAD_YABITS is not set
Add new board: Purism Librem Server L1UM (#858) * modules/coreboot: add option to use coreboot 4.11 Port patches from coreboot 4.8.1 to 4.11: * 0000-measure-boot -> 0001 * 0010-cross-compiler-support All other patches for coreboot 4.8.1 have either already been integrated, or are for platforms which do not need to be migrated to coreboot 4.11 (they will move to 4.12 or newer). Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * patches/coreboot-4.11: Add Broadwell-DE platform patch Add a patch for FSP Broadwell-DE to make use of Heads' measured boot. Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * patches/coreboot-4.11: Add patch to read serial # from CBFS Will be used by multiple Librem boards. Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * patches/coreboot-4.11: add board support for Librem Server L1UM Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * Librem Server L1UM: add new board Add board config, coreboot config, kernel config files. Add conditional purism-blobs dependency to coreboot-4.11 module. Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * flash.sh: add special handling for librem_l1um board Add support for persisting PCIe config via PCHSTRP9 in flash descriptor. This is needed to support multiple variants of the L1UM server which use the same firmware but differ in PCIe lane configuration via the PCH straps configuration in the flash descriptor. Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * patches/coreboot-4.11: Add 'Use PRIxPTR to print uintptr_t' patch Cherry-picked from upstream coreboot (post-4.11), fixes compilation issue. Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> * CircleCI: add target to build board librem_l1um Signed-off-by: Matt DeVillier <matt.devillier@puri.sm>
2020-10-18 18:48:25 +00:00
CONFIG_PAYLOAD_LINUX=y
# CONFIG_PAYLOAD_TIANOCORE is not set
CONFIG_PAYLOAD_FILE="@BOARD_BUILD_DIR@/bzImage"
CONFIG_LINUX_INITRD="@BOARD_BUILD_DIR@/initrd.cpio.xz"
CONFIG_PAYLOAD_OPTIONS=""
# CONFIG_PXE is not set
# CONFIG_PAYLOAD_IS_FLAT_BINARY is not set
CONFIG_COMPRESS_SECONDARY_PAYLOAD=y
#
# Secondary Payloads
#
# CONFIG_COREINFO_SECONDARY_PAYLOAD is not set
# CONFIG_MEMTEST_SECONDARY_PAYLOAD is not set
# CONFIG_NVRAMCUI_SECONDARY_PAYLOAD is not set
# CONFIG_TINT_SECONDARY_PAYLOAD is not set
#
# Debugging
#
#
# CPU Debug Settings
#
CONFIG_HAVE_DISPLAY_MTRRS=y
# CONFIG_DISPLAY_MTRRS is not set
#
# BLOB Debug Settings
#
#
# General Debug Settings
#
# CONFIG_FATAL_ASSERTS is not set
# CONFIG_DEBUG_CBFS is not set
# CONFIG_HAVE_DEBUG_RAM_SETUP is not set
# CONFIG_HAVE_DEBUG_SMBUS is not set
# CONFIG_DEBUG_SMI is not set
# CONFIG_DEBUG_MALLOC is not set
# CONFIG_DEBUG_CONSOLE_INIT is not set
# CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_TRACE is not set
# CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set
CONFIG_HAVE_EM100_SUPPORT=y
# CONFIG_EM100 is not set
CONFIG_NO_EDID_FILL_FB=y
CONFIG_NO_FMAP_CACHE=y
# CONFIG_ENABLE_APIC_EXT_ID is not set
CONFIG_WARNINGS_ARE_ERRORS=y
# CONFIG_POWER_BUTTON_DEFAULT_ENABLE is not set
# CONFIG_POWER_BUTTON_DEFAULT_DISABLE is not set
# CONFIG_POWER_BUTTON_FORCE_ENABLE is not set
# CONFIG_POWER_BUTTON_FORCE_DISABLE is not set
# CONFIG_POWER_BUTTON_IS_OPTIONAL is not set
# CONFIG_REG_SCRIPT is not set
# CONFIG_NO_XIP_EARLY_STAGES is not set
# CONFIG_EARLY_CBMEM_LIST is not set
CONFIG_RELOCATABLE_MODULES=y
CONFIG_NO_STAGE_CACHE=y
CONFIG_BOOTBLOCK_CUSTOM=y
CONFIG_HAVE_ROMSTAGE=y
CONFIG_HAVE_RAMSTAGE=y