Martin Stein 60a7fe5586 hw & arm: write whole SPSR in mode transition ... Previously we did write the SPSR via an MSR instruction without additional flags. Unfortunately, this tells the CPU to write the register only partially. This often isn't a problem as the users PSR reset value normally is conform to our expectations but in some cases (e.g. PSR endianess bit on WandBoard core #4) the reset value is bad. Thus, we have to add the CXSF flags (access Control + eXtension + Status + Flags) so the CPU overwrites the entire register. Fixes #2254		2017-05-31 13:16:08 +02:00
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doc	hw/doc: Update Muen tutorial	2017-05-02 15:28:53 +02:00
etc	base: remove include/spec/* other than ISA	2017-05-31 13:16:01 +02:00
include	Annotate session interfaces with CAP_QUOTA	2017-05-31 13:16:04 +02:00
lib/mk	base: remove include/spec/* other than ISA	2017-05-31 13:16:01 +02:00
ports	Update Muen port	2017-05-02 15:28:53 +02:00
recipes	Depot-archive recipes	2017-05-31 13:15:56 +02:00
run	hw: destroy active scheduling context (fix #1537)	2017-03-15 12:32:25 +01:00
src	hw & arm: write whole SPSR in mode transition	2017-05-31 13:16:08 +02:00