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'Core_tlb' ensures that core never throws pagefaults, in contrast to its base 'Tlb' that is planned to use displacement in the future. 'Core_tlb' enables the application of differenet memory attributes in core, according to the board specific partitioning of the physical address space. This way it enables caching in core. |
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| .. | ||
| 32bit/base | ||
| 64bit/base | ||
| arm/cpu | ||
| base | ||
| cap_session | ||
| cpu_session | ||
| dataspace | ||
| drivers/uart | ||
| io_mem_session | ||
| io_port_session | ||
| irq_session | ||
| log_session | ||
| pager | ||
| parent | ||
| pd_session | ||
| platform | ||
| ram_session | ||
| rm_session | ||
| rom_session | ||
| root | ||
| session | ||
| signal_session | ||
| thread | ||
| util | ||
| x86/cpu | ||
| x86_32/cpu | ||
| x86_64/cpu | ||
| README | ||
This directory contains include files of interfaces that are exported by components to be used by other components. Each subdirectory corresponds to the component exporting the interface.