Sebastian Sumpf fd0e6685fc riscv: Use Qemu and update to ISA v1.10 ... - remove Spike/BBL support in favour of Qemu (>=4.2.1) - add 'riscv_qemu' board, remove 'spike' board' - update to privileged ISA v1.10 (from v1.9.1) - use direct system calls for privileged core threads (they call into the kernel and don't use mode changing system calls, i.e. 'ecall', semantics) - use 'OpenSBI' semtantics for SBI calls (to machine mode) instead of BBL issue #4012		2021-02-23 12:02:44 +01:00
..
bootstrap-hw-pc.mk	base-hw: simplify board support in external repo	2021-01-25 13:58:10 +01:00
core-hw-pc.mk	riscv: Use Qemu and update to ISA v1.10	2021-02-23 12:02:44 +01:00
ld-hw.mk	Genode application binary interface (ABI)	2016-12-23 16:50:28 +01:00
startup-hw.mk	Disambiguate kernel-specific file names	2016-12-23 16:51:32 +01:00
syscall-hw.mk	base-hw: simplify board support in external repo	2021-01-25 13:58:10 +01:00