genode/bootstrap-hw-riscv_qemu.mk at ce31c90bc3c7642ba83383477b53c2abc4d6600f - genode - Gitea

ExternalVendorCode/genode

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Sebastian Sumpf fd0e6685fc riscv: Use Qemu and update to ISA v1.10

- remove Spike/BBL support in favour of Qemu (>=4.2.1)
- add 'riscv_qemu' board, remove 'spike' board'
- update to privileged ISA v1.10 (from v1.9.1)
- use direct system calls for privileged core threads (they call into
  the kernel and don't use mode changing system calls, i.e. 'ecall',
  semantics)
- use 'OpenSBI' semtantics for SBI calls (to machine mode) instead of
  BBL

issue #4012

2021-02-23 12:02:44 +01:00

11 lines

317 B

Makefile

Raw Blame History

 INC_DIR += $(REP_DIR)/src/bootstrap/board/riscv_qemu
 SRC_CC  += bootstrap/spec/riscv/platform.cc
 SRC_S   += bootstrap/spec/riscv/crt0.s
 SRC_CC  += lib/base/riscv/kernel/interface.cc
 SRC_CC  += spec/64bit/memory_map.cc
 vpath spec/64bit/memory_map.cc $(REP_DIR)/src/lib/hw
 include $(REP_DIR)/lib/mk/bootstrap-hw.inc