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250 lines
7.1 KiB
C++
250 lines
7.1 KiB
C++
/*
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* \brief VirtIO PCI device
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* \author Piotr Tworek
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* \date 2019-09-27
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*/
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/*
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* Copyright (C) 2020 Genode Labs GmbH
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*
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* This file is part of the Genode OS framework, which is distributed
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* under the terms of the GNU Affero General Public License version 3.
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*/
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#ifndef _INCLUDE__VIRTIO__PCI_DEVICE_H_
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#define _INCLUDE__VIRTIO__PCI_DEVICE_H_
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#include <platform_session/device.h>
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#include <virtio/queue.h>
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namespace Virtio {
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using namespace Genode;
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struct Device_mmio;
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class Device;
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}
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struct Virtio::Device_mmio : public Genode::Mmio<0x100>
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{
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struct DeviceFeatureSelect : Register<0x00, 32> { };
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struct DeviceFeature : Register<0x04, 32> { };
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struct DriverFeatureSelect : Register<0x08, 32> { };
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struct DriverFeature : Register<0x0C, 32> { };
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struct MsiXConfig : Register<0x10, 16> { };
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struct NumQueues : Register<0x12, 16> { };
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struct DeviceStatus : Register<0x14, 8> { };
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struct ConfigGeneration : Register<0x15, 8> { };
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struct QueueSelect : Register<0x16, 16> { };
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struct QueueSize : Register<0x18, 16> { };
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struct QueueMsixVector : Register<0x1A, 16> { };
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struct QueueEnable : Register<0x1C, 16> { };
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struct QueueNotifyOff : Register<0x1E, 16> { };
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struct QueueDescLow : Register<0x20, 32> { };
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struct QueueDescHigh : Register<0x24, 32> { };
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struct QueueAvailLow : Register<0x28, 32> { };
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struct QueueAvailHigh : Register<0x2C, 32> { };
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struct QueueUsedLow : Register<0x30, 32> { };
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struct QueueUsedHigh : Register<0x34, 32> { };
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template <typename T> class Config :
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public Register_array<0x0, sizeof(T)*8,
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256/sizeof(T), sizeof(T)*8> {};
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struct IrqReason : Register<0x0, 32> { };
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using Mmio::Mmio;
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};
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class Virtio::Device
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{
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public:
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struct Configuration_failed : Genode::Exception { };
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enum Status : uint8_t
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{
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RESET = 0,
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ACKNOWLEDGE = 1 << 0,
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DRIVER = 1 << 1,
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DRIVER_OK = 1 << 2,
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FEATURES_OK = 1 << 3,
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FAILED = 1 << 7,
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};
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enum Access_size : uint8_t
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{
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ACCESS_8BIT,
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ACCESS_16BIT,
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ACCESS_32BIT,
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};
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private:
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/*
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* Noncopyable
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*/
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Device(Device const &) = delete;
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Device &operator = (Device const &) = delete;
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enum {
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VIRTIO_PCI_BASE_ID = 0x1040,
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VIRTIO_MSI_NO_VECTOR = 0xffff,
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MMIO_MAX = 6U
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};
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Env & _env;
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Platform::Connection & _plat;
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Platform::Device _device { _plat };
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Platform::Device::Irq _irq { _device, { 0 } };
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Constructible<Platform::Device::Mmio<0> > _mmio[MMIO_MAX] { };
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Device_mmio _cfg_common { _bar_range("common") };
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Device_mmio _dev_config { _bar_range("device") };
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Device_mmio _notify { _bar_range("notify") };
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Device_mmio _isr { _bar_range("irq_status") };
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size_t _notify_offset_multiplier { 0 };
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void with_virtio_range(String<16> type, auto const &fn)
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{
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_plat.update();
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_plat.with_xml([&] (Xml_node xml) {
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xml.with_optional_sub_node("device", [&] (Xml_node xml) {
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xml.with_optional_sub_node("pci-config",
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[&] (Xml_node xml) {
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xml.for_each_sub_node("virtio_range",
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[&] (Xml_node xml) {
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if (xml.attribute_value("type", String<16>()) ==
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type)
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fn(xml);
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});
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});
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});
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});
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}
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Byte_range_ptr _bar_range(String<16> type)
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{
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unsigned idx = MMIO_MAX;
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addr_t off = ~0UL;
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with_virtio_range(type, [&] (Xml_node xml) {
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idx = xml.attribute_value<unsigned>("index", MMIO_MAX);
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off = xml.attribute_value("offset", ~0UL);
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});
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if (idx >= MMIO_MAX || off == ~0UL)
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throw Configuration_failed();
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if (!_mmio[idx].constructed())
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_mmio[idx].construct(_device,
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Platform::Device::Mmio<0>::Index{idx});
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return _mmio[idx]->range_at(off);
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}
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public:
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Device(Genode::Env & env,
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Platform::Connection & plat)
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: _env(env), _plat(plat)
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{
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with_virtio_range("notify", [&] (Xml_node xml) {
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_notify_offset_multiplier = xml.attribute_value("factor", 0UL);
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});
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_cfg_common.write<Device_mmio::MsiXConfig>(VIRTIO_MSI_NO_VECTOR);
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}
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uint8_t get_status() {
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return _cfg_common.read<Device_mmio::DeviceStatus>(); }
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bool set_status(uint8_t status)
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{
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_cfg_common.write<Device_mmio::DeviceStatus>(status);
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return _cfg_common.read<Device_mmio::DeviceStatus>() == status;
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}
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uint32_t get_features(uint32_t selection)
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{
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_cfg_common.write<Device_mmio::DeviceFeatureSelect>(selection);
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return _cfg_common.read<Device_mmio::DeviceFeature>();
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}
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void set_features(uint32_t selection, uint32_t features)
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{
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_cfg_common.write<Device_mmio::DriverFeatureSelect>(selection);
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_cfg_common.write<Device_mmio::DriverFeature>(features);
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}
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uint8_t get_config_generation() {
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return _cfg_common.read<Device_mmio::ConfigGeneration>(); }
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uint16_t get_max_queue_size(uint16_t queue_index)
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{
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_cfg_common.write<Device_mmio::QueueSelect>(queue_index);
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return _cfg_common.read<Device_mmio::QueueSize>();
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}
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template <typename T>
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T read_config(const uint8_t offset)
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{
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static_assert(sizeof(T) <= 4);
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return _dev_config.read<Device_mmio::Config<T>>(offset >> log2(sizeof(T)));
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}
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template <typename T>
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void write_config(const uint8_t offset, const T value)
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{
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static_assert(sizeof(T) <= 4);
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_dev_config.write<Device_mmio::Config<T>>(value,
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(offset >> log2(sizeof(T))));
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}
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bool configure_queue(uint16_t queue_index, Virtio::Queue_description desc)
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{
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_cfg_common.write<Device_mmio::QueueSelect>(queue_index);
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if (_cfg_common.read<Device_mmio::QueueEnable>()) {
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warning("VirtIO queues can't be re-configured after being enabled!");
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return false;
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}
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_cfg_common.write<Device_mmio::QueueMsixVector>(VIRTIO_MSI_NO_VECTOR);
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if (_cfg_common.read<Device_mmio::QueueMsixVector>() != VIRTIO_MSI_NO_VECTOR) {
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error("Failed to disable MSI-X for queue ", queue_index);
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return false;
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}
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_cfg_common.write<Device_mmio::QueueSize>(desc.size);
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uint64_t addr = desc.desc;
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_cfg_common.write<Device_mmio::QueueDescLow>((uint32_t)addr);
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_cfg_common.write<Device_mmio::QueueDescHigh>((uint32_t)(addr >> 32));
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addr = desc.avail;
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_cfg_common.write<Device_mmio::QueueAvailLow>((uint32_t)addr);
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_cfg_common.write<Device_mmio::QueueAvailHigh>((uint32_t)(addr >> 32));
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addr = desc.used;
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_cfg_common.write<Device_mmio::QueueUsedLow>((uint32_t)addr);
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_cfg_common.write<Device_mmio::QueueUsedHigh>((uint32_t)(addr >> 32));
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_cfg_common.write<Device_mmio::QueueEnable>(1);
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return _cfg_common.read<Device_mmio::QueueEnable>() != 0;
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}
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void notify_buffers_available(uint16_t queue_index) {
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_cfg_common.write<Device_mmio::QueueSelect>(queue_index);
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auto const offset = _cfg_common.read<Device_mmio::QueueNotifyOff>();
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auto const addr = (offset * _notify_offset_multiplier >> 1) + 1;
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*(uint16_t*)(_notify.base() + addr) = queue_index;
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}
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uint32_t read_isr() {
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return _isr.read<Device_mmio::IrqReason>(); }
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void irq_sigh(Signal_context_capability cap) {
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_irq.sigh(cap); }
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void irq_ack() { _irq.ack(); }
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};
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#endif /* _INCLUDE__VIRTIO__PCI_DEVICE_H_ */
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