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'Core_tlb' ensures that core never throws pagefaults, in contrast to its base 'Tlb' that is planned to use displacement in the future. 'Core_tlb' enables the application of differenet memory attributes in core, according to the board specific partitioning of the physical address space. This way it enables caching in core.
67 lines
1.4 KiB
C++
67 lines
1.4 KiB
C++
/*
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* \brief Driver for the OMAP4 PandaBoard revision A2
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* \author Martin stein
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* \date 2011-11-03
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*/
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/*
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* Copyright (C) 2011-2012 Genode Labs GmbH
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*
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* This file is part of the Genode OS framework, which is distributed
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* under the terms of the GNU General Public License version 2.
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*/
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#ifndef _INCLUDE__DRIVERS__BOARD_H_
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#define _INCLUDE__DRIVERS__BOARD_H_
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namespace Genode
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{
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/**
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* Driver for the OMAP4 PandaBoard revision A2
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*/
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struct Board
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{
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enum
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{
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/* device IO memory */
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MMIO_0_BASE = 0x48000000,
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MMIO_0_SIZE = 0x01000000,
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MMIO_1_BASE = 0x4a000000,
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MMIO_1_SIZE = 0x01000000,
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/* normal RAM */
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RAM_0_BASE = 0x80000000,
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RAM_0_SIZE = 0x40000000,
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/* clocks */
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MPU_DPLL_CLOCK = 200*1000*1000,
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/* UART */
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TL16C750_3_MMIO_BASE = 0x48020000,
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TL16C750_3_MMIO_SIZE = 0x00002000,
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TL16C750_3_CLOCK = 48*1000*1000,
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TL16C750_3_IRQ = 74,
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/* CPU */
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CORTEX_A9_PRIVATE_MEM_BASE = 0x48240000,
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CORTEX_A9_PRIVATE_MEM_SIZE = 0x00002000,
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CORTEX_A9_CLOCK = MPU_DPLL_CLOCK,
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/* display subsystem */
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DSS_MMIO_BASE = 0x58000000,
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DSS_MMIO_SIZE = 0x00001000,
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DISPC_MMIO_BASE = 0x58001000,
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DISPC_MMIO_SIZE = 0x00001000,
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HDMI_MMIO_BASE = 0x58006000,
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HDMI_MMIO_SIZE = 0x00001000,
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/* misc */
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SECURITY_EXTENSION = 0,
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SYS_CLK = 38400000,
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};
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};
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}
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#endif /* _INCLUDE__DRIVERS__BOARD_H_ */
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