3 Commits

Author	SHA1	Message	Date
Sebastian Sumpf	fd0e6685fc	riscv: Use Qemu and update to ISA v1.10 ... - remove Spike/BBL support in favour of Qemu (>=4.2.1) - add 'riscv_qemu' board, remove 'spike' board' - update to privileged ISA v1.10 (from v1.9.1) - use direct system calls for privileged core threads (they call into the kernel and don't use mode changing system calls, i.e. 'ecall', semantics) - use 'OpenSBI' semtantics for SBI calls (to machine mode) instead of BBL issue #4012	2021-02-23 12:02:44 +01:00
Norman Feske	8cc2662aac	Remove support for the Muen separation kernel ... Fixes #3995 Fixes #3994	2021-02-23 11:55:44 +01:00
Norman Feske	c4cf9b6e6d	base-hw: introduce board-property directories ... This patch moves the bootstrap-link-address information from the tool/run/boot_dir/hw file to board-specific property files that can be accessed by using the board as key. This eliminates the need to customize boot_dir/hw when hosting board-support in an external repository. Fixes #3998	2021-01-25 14:00:43 +01:00