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base-hw: unprivileged cache maintenance on ARMv8
Set 'Sctlr_el1::Uci' bit to allow for executing cache clean and invalidate instruction from user space. Issue #4339.
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@ -199,6 +199,7 @@ unsigned Bootstrap::Platform::enable_mmu()
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Cpu::Sctlr::Sa0::set(sctlr, 1);
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Cpu::Sctlr::Sa::set(sctlr, 0);
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Cpu::Sctlr::Uct::set(sctlr, 1);
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Cpu::Sctlr::Uci::set(sctlr, 1);
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Cpu::Sctlr_el1::write(sctlr);
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return cpu_id;
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@ -168,6 +168,7 @@ struct Hw::Arm_64_cpu
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struct I : Bitfield<12, 1> { };
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struct Uct : Bitfield<15, 1> { };
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struct Wxn : Bitfield<19, 1> { };
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struct Uci : Bitfield<26, 1> { };
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};
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SYSTEM_REGISTER(64, Sctlr_el1, sctlr_el1);
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