driver/platform: remember bridge configuration

by evaluating the pci decode's 'devices' ROM and storing the information in
the pci config list model representation.

Issue #5241
This commit is contained in:
Alexander Boettcher 2024-06-06 11:08:39 +02:00 committed by Norman Feske
parent 0c97c13562
commit 3216733a05
2 changed files with 60 additions and 14 deletions

View File

@ -354,9 +354,26 @@ void Driver::Device::update(Allocator &alloc, Xml_node const &node)
0xffff);
bool bridge = node.attribute_value("bridge", false);
auto io_base_limit = node.attribute_value("io_base_limit", uint16_t(0u));
auto memory_base = node.attribute_value("memory_base", uint16_t(0u));
auto memory_limit = node.attribute_value("memory_limit", uint16_t(0u));
auto prefetch_mb = node.attribute_value("prefetch_memory_base", 0u);
auto prefetch_mb_u = node.attribute_value("prefetch_memory_base_upper", 0u);
auto prefetch_ml_u = node.attribute_value("prefetch_memory_limit_upper", 0u);
auto io_base_limit_upper = node.attribute_value("io_base_limit_upper", 0u);
auto expansion_rom_base = node.attribute_value("expansion_rom_base", 0u);
auto bridge_control = node.attribute_value("bridge_control", uint16_t(0u));
return *(new (alloc) Pci_config(addr, bus_num, dev_num, func_num,
vendor_id, device_id, class_code,
rev, sub_v_id, sub_d_id, bridge));
rev, sub_v_id, sub_d_id, bridge,
io_base_limit, memory_base,
memory_limit, prefetch_mb,
prefetch_mb_u, prefetch_ml_u,
io_base_limit_upper,
expansion_rom_base,
bridge_control));
},
/* destroy */

View File

@ -229,17 +229,28 @@ class Driver::Device : private List_model<Device>::Element
struct Pci_config : List_model<Pci_config>::Element
{
addr_t addr;
Pci::bus_t bus_num;
Pci::dev_t dev_num;
Pci::func_t func_num;
Pci::vendor_t vendor_id;
Pci::device_t device_id;
Pci::class_t class_code;
Pci::rev_t revision;
Pci::vendor_t sub_vendor_id;
Pci::device_t sub_device_id;
bool bridge;
addr_t const addr;
Pci::bus_t const bus_num;
Pci::dev_t const dev_num;
Pci::func_t const func_num;
Pci::vendor_t const vendor_id;
Pci::device_t const device_id;
Pci::class_t const class_code;
Pci::rev_t const revision;
Pci::vendor_t const sub_vendor_id;
Pci::device_t const sub_device_id;
/* bridge specific (header type 0x1) values */
bool const bridge;
uint16_t const io_base_limit;
uint16_t const memory_base;
uint16_t const memory_limit;
uint16_t const bridge_control;
unsigned const prefetch_memory_base;
unsigned const prefetch_memory_base_upper;
unsigned const prefetch_memory_limit_upper;
unsigned const io_base_limit_upper;
unsigned const expansion_rom_base;
Pci_config(addr_t addr,
Pci::bus_t bus_num,
@ -251,7 +262,16 @@ class Driver::Device : private List_model<Device>::Element
Pci::rev_t revision,
Pci::vendor_t sub_vendor_id,
Pci::device_t sub_device_id,
bool bridge)
bool bridge,
uint16_t io_base_limit,
uint16_t memory_base,
uint16_t memory_limit,
unsigned prefetch_memory_base,
unsigned prefetch_memory_base_upper,
unsigned prefetch_memory_limit_upper,
unsigned io_base_limit_upper,
unsigned expansion_rom_base,
uint16_t bridge_control)
:
addr(addr),
bus_num(bus_num),
@ -263,7 +283,16 @@ class Driver::Device : private List_model<Device>::Element
revision(revision),
sub_vendor_id(sub_vendor_id),
sub_device_id(sub_device_id),
bridge(bridge)
bridge(bridge),
io_base_limit(io_base_limit),
memory_base(memory_base),
memory_limit(memory_limit),
bridge_control(bridge_control),
prefetch_memory_base(prefetch_memory_base),
prefetch_memory_base_upper(prefetch_memory_base_upper),
prefetch_memory_limit_upper(prefetch_memory_limit_upper),
io_base_limit_upper(io_base_limit_upper),
expansion_rom_base(expansion_rom_base)
{ }
bool matches(Xml_node const &node) const