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base-hw: flush cached zeroes in 'clear_ds(...)'

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Ref #706
This commit is contained in:
Martin Stein
2013-04-29 18:58:11 +02:00
committed by Norman Feske
parent a0d182e25a
commit 2e7802b799
10 changed files with 82 additions and 5 deletions
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5
base/include/platform/arndale/drivers/board_base.h
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@ -49,7 +49,10 @@ namespace Genode
MCT_CLOCK = 24000000,
MCT_IRQ_L0 = 152,
/* if board provides security extension */
/* CPU cache */
CACHE_LINE_SIZE_LOG2 = 6,
/* wether board provides security extension */
SECURITY_EXTENSION = 1,
};
};

3
base/include/platform/imx31/drivers/board_base.h
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@ -52,6 +52,9 @@ namespace Genode
AIPS_2_MMIO_BASE = 0x53F00000,
AIPS_2_MMIO_SIZE = 0x00004000,
/* CPU cache */
CACHE_LINE_SIZE_LOG2 = 2, /* FIXME get correct value from board spec */
};
};
}

4
base/include/platform/imx53/drivers/board_base.h
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@ -103,7 +103,11 @@ namespace Genode
IIM_BASE = 0x63f98000,
IIM_SIZE = 0x00004000,
/* wether board provides security extension */
SECURITY_EXTENSION = 1,
/* CPU cache */
CACHE_LINE_SIZE_LOG2 = 2, /* FIXME get correct value from board spec */
};
};
}

8
base/include/platform/panda/drivers/board_base.h
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@ -35,6 +35,7 @@ namespace Genode
/* clocks */
MPU_DPLL_CLOCK = 200*1000*1000,
SYS_CLK = 38400000,
/* UARTs */
TL16C750_1_MMIO_BASE = MMIO_0_BASE + 0x6a000,
@ -83,9 +84,12 @@ namespace Genode
GPIO6_MMIO_SIZE = 0x1000,
GPIO6_IRQ = 34 + 32,
/* misc */
/* CPU cache */
CACHE_LINE_SIZE_LOG2 = 2, /* FIXME get correct value from board spec */
/* wether board provides security extension */
SECURITY_EXTENSION = 0,
SYS_CLK = 38400000,
};
};
}

4
base/include/platform/pbxa9/drivers/board_base.h
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@ -63,6 +63,10 @@ namespace Genode
SP804_0_1_IRQ = 36,
SP804_0_1_CLOCK = 1000*1000,
/* CPU cache */
CACHE_LINE_SIZE_LOG2 = 2, /* FIXME get correct value from board spec */
/* wether board provides security extension */
SECURITY_EXTENSION = 0,
};
};

4
base/include/platform/vea9x4/drivers/board_base.h
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@ -69,7 +69,11 @@ namespace Genode
CORTEX_A9_PRIVATE_MEM_SIZE = 0x2000,
CORTEX_A9_CLOCK = TCREF_CLOCK,
/* wether board provides security extension */
SECURITY_EXTENSION = 1,
/* CPU cache */
CACHE_LINE_SIZE_LOG2 = 2, /* FIXME get correct value from board spec */
};
};
}