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Implement i.MX53 gpio driver

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This commit is contained in:
Nikolay Golikov 2012-12-10 16:34:42 +04:00 committed by Norman Feske
parent 8e9e866161
commit 1d1081c910
6 changed files with 772 additions and 1 deletions
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11
os/run/demo.run
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@ -10,7 +10,8 @@ set build_components {
drivers/framebuffer drivers/pci drivers/input
}
lappend_if [have_spec usb] build_components drivers/usb
lappend_if [have_spec usb] build_components drivers/usb
lappend_if [have_spec imx53] build_components drivers/gpio
build $build_components
@ -60,6 +61,13 @@ append_if [have_spec framebuffer] config {
<provides><service name="Framebuffer"/></provides>
</start>}
append_if [have_spec imx53] config {
<start name="gpio_drv">
<resource name="RAM" quantum="4M"/>
<provides><service name="Gpio"/></provides>
<config/>
</start>}
append_if [have_spec ps2] config {
<start name="ps2_drv">
<resource name="RAM" quantum="1M"/>
@ -107,6 +115,7 @@ lappend_if [have_spec pci] boot_modules pci_drv
lappend_if [have_spec ps2] boot_modules ps2_drv
lappend_if [have_spec framebuffer] boot_modules fb_drv
lappend_if [have_spec usb] boot_modules usb_drv
lappend_if [have_spec imx53] boot_modules gpio_drv
build_boot_image $boot_modules

407
os/src/drivers/gpio/imx53/driver.h Normal file
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@ -0,0 +1,407 @@
/*
* \brief Gpio driver for the i.MX53
* \author Ivan Loskutov <ivan.loskutov@ksyslabs.org>
* \author Nikolay Golikov <nik@ksyslabs.org>
* \date 2012-12-04
*/
/*
* Copyright (C) 2012 Ksys Labs LLC
* Copyright (C) 2012 Genode Labs GmbH
*
* This file is part of the Genode OS framework, which is distributed
* under the terms of the GNU General Public License version 2.
*/
#ifndef _DRIVER_H_
#define _DRIVER_H_
/* Genode includes */
#include <os/attached_io_mem_dataspace.h>
#include <timer_session/connection.h>
#include <util/mmio.h>
#include <base/signal.h>
/* local includes */
#include "gpio.h"
namespace Gpio {
using namespace Genode;
class Driver;
}
static int verbose = 0;
class Gpio::Driver
{
public:
enum {
GPIO1L_IRQ = 50,
GPIO1H_IRQ = 51,
GPIO2L_IRQ = 52,
GPIO2H_IRQ = 53,
GPIO3L_IRQ = 54,
GPIO3H_IRQ = 55,
GPIO4L_IRQ = 56,
GPIO4H_IRQ = 57,
GPIO5L_IRQ = 103,
GPIO5H_IRQ = 104,
GPIO6L_IRQ = 105,
GPIO6H_IRQ = 106,
GPIO7L_IRQ = 107,
GPIO7H_IRQ = 108,
};
private:
struct Timer_delayer : Timer::Connection, Mmio::Delayer
{
/**
* Implementation of 'Delayer' interface
*/
void usleep(unsigned us)
{
/* polling */
if (us == 0)
return;
unsigned ms = us / 1000;
if (ms == 0)
ms = 1;
Timer::Connection::msleep(ms);
}
} _delayer;
/* memory map */
enum {
GPIO1_MMIO_BASE = 0x53f84000,
GPIO1_MMIO_SIZE = 0x4000,
GPIO2_MMIO_BASE = 0x53f88000,
GPIO2_MMIO_SIZE = 0x4000,
GPIO3_MMIO_BASE = 0x53f8c000,
GPIO3_MMIO_SIZE = 0x4000,
GPIO4_MMIO_BASE = 0x53f90000,
GPIO4_MMIO_SIZE = 0x4000,
GPIO5_MMIO_BASE = 0x53fdc000,
GPIO5_MMIO_SIZE = 0x4000,
GPIO6_MMIO_BASE = 0x53fe0000,
GPIO6_MMIO_SIZE = 0x4000,
GPIO7_MMIO_BASE = 0x53fe4000,
GPIO7_MMIO_SIZE = 0x4000,
NR_GPIOS = 7,
MAX_GPIOS = 224,
};
Attached_io_mem_dataspace _gpio1_mmio;
Gpio_reg _gpio1;
Attached_io_mem_dataspace _gpio2_mmio;
Gpio_reg _gpio2;
Attached_io_mem_dataspace _gpio3_mmio;
Gpio_reg _gpio3;
Attached_io_mem_dataspace _gpio4_mmio;
Gpio_reg _gpio4;
Attached_io_mem_dataspace _gpio5_mmio;
Gpio_reg _gpio5;
Attached_io_mem_dataspace _gpio6_mmio;
Gpio_reg _gpio6;
Attached_io_mem_dataspace _gpio7_mmio;
Gpio_reg _gpio7;
Gpio_reg* _gpio_bank[NR_GPIOS];
bool _irq_enabled[MAX_GPIOS];
Signal_context_capability _sign[MAX_GPIOS];
struct Debounce_stat
{
unsigned int us;
bool enable;
Debounce_stat() : us(0), enable(false) { }
} _debounce_stat[MAX_GPIOS];
public:
Driver();
bool set_gpio_direction(int gpio, bool is_input);
bool set_gpio_dataout(int gpio, bool enable);
int get_gpio_datain(int gpio);
bool set_gpio_debounce_enable(int gpio, bool enable);
bool set_gpio_debouncing_time(int gpio, unsigned int us);
bool set_gpio_falling_detect(int gpio, bool enable);
bool set_gpio_rising_detect(int gpio, bool enable);
bool set_gpio_irq_enable(int gpio, bool enable);
void register_signal(Signal_context_capability cap, int gpio)
{
if (!_sign[gpio].valid()) {
_sign[gpio] = cap;
}
}
void handle_event(int irq_number);
private:
Gpio_reg *_get_gpio_bank(int gpio) { return _gpio_bank[gpio >> 5]; }
bool _gpio_valid(int gpio) { return (gpio < MAX_GPIOS) ? true : false; }
int _get_gpio_index(int gpio) { return gpio & 0x1f; }
inline void _irq_signal_send(int gpio)
{
if (_sign[gpio].valid()) {
if (verbose)
PDBG("gpio=%d", gpio);
Signal_transmitter transmitter(_sign[gpio]);
transmitter.submit();
}
}
inline void _irq_event(int gpio_bank, uint32_t status)
{
for (int i=0; i<32; i++) {
if ((status & (1 << i)) && _irq_enabled[(gpio_bank<<5) + i])
_irq_signal_send( (gpio_bank<<5) + i );
}
}
};
Gpio::Driver::Driver()
:
_gpio1_mmio(GPIO1_MMIO_BASE, GPIO1_MMIO_SIZE),
_gpio1((addr_t)_gpio1_mmio.local_addr<void>()),
_gpio2_mmio(GPIO2_MMIO_BASE, GPIO2_MMIO_SIZE),
_gpio2((addr_t)_gpio2_mmio.local_addr<void>()),
_gpio3_mmio(GPIO3_MMIO_BASE, GPIO3_MMIO_SIZE),
_gpio3((addr_t)_gpio3_mmio.local_addr<void>()),
_gpio4_mmio(GPIO4_MMIO_BASE, GPIO4_MMIO_SIZE),
_gpio4((addr_t)_gpio4_mmio.local_addr<void>()),
_gpio5_mmio(GPIO5_MMIO_BASE, GPIO5_MMIO_SIZE),
_gpio5((addr_t)_gpio5_mmio.local_addr<void>()),
_gpio6_mmio(GPIO6_MMIO_BASE, GPIO6_MMIO_SIZE),
_gpio6((addr_t)_gpio6_mmio.local_addr<void>()),
_gpio7_mmio(GPIO7_MMIO_BASE, GPIO7_MMIO_SIZE),
_gpio7((addr_t)_gpio7_mmio.local_addr<void>())
{
_gpio_bank[0] = &_gpio1;
_gpio_bank[1] = &_gpio2;
_gpio_bank[2] = &_gpio3;
_gpio_bank[3] = &_gpio4;
_gpio_bank[4] = &_gpio5;
_gpio_bank[5] = &_gpio6;
_gpio_bank[6] = &_gpio7;
for (int i = 0; i < MAX_GPIOS; ++i) {
Gpio_reg *gpio_reg = _get_gpio_bank(i);
gpio_reg->write<Gpio_reg::Int_conf::Pin>(Gpio_reg::Int_conf::HIGH_LEVEL,
_get_gpio_index(i));
}
}
bool Gpio::Driver::set_gpio_direction(int gpio, bool is_input)
{
if (verbose) {
PDBG("gpio=%d is_input=%d", gpio, is_input);
}
if (!_gpio_valid(gpio))
return false;
Gpio_reg *gpio_reg = _get_gpio_bank(gpio);
if (is_input)
gpio_reg->write<Gpio_reg::Dir::Pin>(0, _get_gpio_index(gpio));
else
gpio_reg->write<Gpio_reg::Dir::Pin>(1, _get_gpio_index(gpio));
return true;
}
bool Gpio::Driver::set_gpio_dataout(int gpio, bool enable)
{
if (verbose)
PDBG("gpio=%d enable=%d", gpio, enable);
if (!_gpio_valid(gpio))
return false;
Gpio_reg *gpio_reg = _get_gpio_bank(gpio);
if (enable)
gpio_reg->write<Gpio_reg::Data::Pin>(1, _get_gpio_index(gpio));
else
gpio_reg->write<Gpio_reg::Data::Pin>(0, _get_gpio_index(gpio));
return true;
}
int Gpio::Driver::get_gpio_datain(int gpio)
{
if (verbose)
PDBG("gpio=%d", gpio);
if (!_gpio_valid(gpio))
return -1;
Gpio_reg *gpio_reg = _get_gpio_bank(gpio);
if (_debounce_stat[gpio].enable)
_delayer.usleep(_debounce_stat[gpio].us);
return gpio_reg->read<Gpio_reg::Pad_stat::Pin>(_get_gpio_index(gpio));
}
bool Gpio::Driver::set_gpio_debounce_enable(int gpio, bool enable)
{
if (verbose)
PDBG("gpio=%d enable=%d", gpio, enable);
if (!_gpio_valid(gpio))
return false;
_debounce_stat[gpio].enable = enable;
return true;
}
bool Gpio::Driver::set_gpio_debouncing_time(int gpio, unsigned int us)
{
if (verbose)
PDBG("gpio=%d us=%d", gpio, us);
if (!_gpio_valid(gpio))
return false;
_debounce_stat[gpio].us = us;
return true;
}
bool Gpio::Driver::set_gpio_falling_detect(int gpio, bool enable)
{
if (verbose)
PDBG("gpio=%d enable=%d", gpio, enable);
if (!_gpio_valid(gpio))
return false;
Gpio_reg *gpio_reg = _get_gpio_bank(gpio);
if (enable)
gpio_reg->write<Gpio_reg::Int_conf::Pin>(Gpio_reg::Int_conf::FAL_EDGE,
_get_gpio_index(gpio));
else
gpio_reg->write<Gpio_reg::Int_conf::Pin>(Gpio_reg::Int_conf::HIGH_LEVEL,
_get_gpio_index(gpio));
return true;
}
bool Gpio::Driver::set_gpio_rising_detect(int gpio, bool enable)
{
if (verbose)
PDBG("gpio=%d enable=%d", gpio, enable);
if (!_gpio_valid(gpio))
return false;
Gpio_reg *gpio_reg = _get_gpio_bank(gpio);
if (enable)
gpio_reg->write<Gpio_reg::Int_conf::Pin>(Gpio_reg::Int_conf::RIS_EDGE,
_get_gpio_index(gpio));
else
gpio_reg->write<Gpio_reg::Int_conf::Pin>(Gpio_reg::Int_conf::HIGH_LEVEL,
_get_gpio_index(gpio));
return true;
}
bool Gpio::Driver::set_gpio_irq_enable(int gpio, bool enable)
{
if (verbose)
PDBG("gpio=%d enable=%d", gpio, enable);
if (!_gpio_valid(gpio))
return false;
Gpio_reg *gpio_reg = _get_gpio_bank(gpio);
if (enable)
gpio_reg->write<Gpio_reg::Int_mask::Pin>(1, _get_gpio_index(gpio));
else
gpio_reg->write<Gpio_reg::Int_mask::Pin>(0, _get_gpio_index(gpio));
_irq_enabled[gpio] = enable;
return true;
}
void Gpio::Driver::handle_event(int irq_number)
{
if (verbose)
PDBG("IRQ #%d\n", irq_number);
int gpio_bank = 0;
switch (irq_number) {
case GPIO1L_IRQ:
case GPIO1H_IRQ:
gpio_bank = 0;
break;
case GPIO2L_IRQ:
case GPIO2H_IRQ:
gpio_bank = 1;
break;
case GPIO3L_IRQ:
case GPIO3H_IRQ:
gpio_bank = 2;
break;
case GPIO4L_IRQ:
case GPIO4H_IRQ:
gpio_bank = 3;
break;
case GPIO5L_IRQ:
case GPIO5H_IRQ:
gpio_bank = 4;
break;
case GPIO6L_IRQ:
case GPIO6H_IRQ:
gpio_bank = 5;
break;
case GPIO7L_IRQ:
case GPIO7H_IRQ:
gpio_bank = 6;
break;
default:
PERR("Unknown Irq number!\n");
return;
}
int stat = _gpio_bank[gpio_bank]->read<Gpio_reg::Int_stat>();
if (verbose)
PDBG("GPIO1 IRQSTATUS=%08x\n", stat);
_irq_event(gpio_bank, stat);
_gpio_bank[gpio_bank]->write<Gpio_reg::Int_stat>(0xffffffff);
}
#endif /* _DRIVER_H_ */

70
os/src/drivers/gpio/imx53/gpio.h Normal file
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@ -0,0 +1,70 @@
/*
* \brief Gpio driver for the i.MX53
* \author Nikolay Golikov <nik@ksyslabs.org>
* \date 2012-12-06
*/
/*
* Copyright (C) 2012 Ksys Labs LLC
* Copyright (C) 2012 Genode Labs GmbH
*
* This file is part of the Genode OS framework, which is distributed
* under the terms of the GNU General Public License version 2.
*/
#ifndef _GPIO_H_
#define _GPIO_H_
/* Genode includes */
#include <util/mmio.h>
struct Gpio_reg : Genode::Mmio
{
Gpio_reg(Genode::addr_t const mmio_base) : Genode::Mmio(mmio_base) { }
struct Data : Register_array<0x0, 32, 32, 1>
{
struct Pin : Bitfield<0, 1> { };
};
struct Dir : Register_array<0x4, 32, 32, 1>
{
struct Pin : Bitfield<0, 1> { };
};
struct Pad_stat : Register_array<0x8, 32, 32, 1>
{
struct Pin : Bitfield<0, 1> { };
};
struct Int_conf : Register_array<0xc, 32, 32, 2>
{
enum {
LOW_LEVEL,
HIGH_LEVEL,
RIS_EDGE,
FAL_EDGE
};
struct Pin : Bitfield<0, 2> { };
};
struct Int_mask : Register_array<0x14, 32, 32, 1>
{
struct Pin : Bitfield<0, 1> { };
};
struct Int_stat : Register_array<0x18, 32, 32, 1>
{
struct Pin : Bitfield<0, 1> { };
};
struct Edge_sel : Register_array<0x1c, 32, 32, 1>
{
struct Pin : Bitfield<0, 1> { };
};
};
#endif

50
os/src/drivers/gpio/imx53/irq_handler.h Normal file
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@ -0,0 +1,50 @@
/*
* \brief Gpio irq-handler
* \author Ivan Loskutov <ivan.loskutov@ksyslabs.org>
* \date 2012-06-23
*/
/*
* Copyright (C) 2012 Ksys Labs LLC
* Copyright (C) 2012 Genode Labs GmbH
*
* This file is part of the Genode OS framework, which is distributed
* under the terms of the GNU General Public License version 2.
*/
#ifndef _IRQ_HANDLER_H_
#define _IRQ_HANDLER_H_
/* Genode includes */
#include <base/thread.h>
#include <irq_session/connection.h>
/* local includes */
#include "driver.h"
class Irq_handler : Genode::Thread<4096>
{
private:
int _irq_number;
Genode::Irq_connection _irq;
Gpio::Driver &_driver;
public:
Irq_handler(int irq_number, Gpio::Driver &driver)
: _irq_number(irq_number), _irq(irq_number), _driver(driver)
{
start();
}
void entry()
{
while (1) {
_driver.handle_event(_irq_number);
_irq.wait_for_irq();
}
}
};
#endif /* _IRQ_HANDLER_H_ */

227
os/src/drivers/gpio/imx53/main.cc Normal file
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@ -0,0 +1,227 @@
/*
* \brief Gpio driver for the i.MX53
* \author Ivan Loskutov <ivan.loskutov@ksyslabs.org>
* \author Nikolay Golikov <nik@ksyslabs.org>
* \date 2012-12-09
*/
/*
* Copyright (C) 2012 Ksys Labs LLC
* Copyright (C) 2012 Genode Labs GmbH
*
* This file is part of the Genode OS framework, which is distributed
* under the terms of the GNU General Public License version 2.
*/
/* Genode includes */
#include <gpio_session/gpio_session.h>
#include <cap_session/connection.h>
#include <dataspace/client.h>
#include <base/printf.h>
#include <base/sleep.h>
#include <root/component.h>
#include <os/config.h>
#include <os/static_root.h>
#include <util/string.h>
/* local includes */
#include "driver.h"
#include "irq_handler.h"
namespace Gpio {
using namespace Genode;
class Session_component;
}
class Gpio::Session_component : public Genode::Rpc_object<Gpio::Session>
{
private:
Driver &_driver;
Signal_context_capability _read_avail_sigh;
public:
Session_component(Driver &driver)
: _driver(driver)
{
}
/************************************
** Gpio::Session interface **
************************************/
void direction_output(int gpio, bool enable)
{
_driver.set_gpio_dataout(gpio, enable);
_driver.set_gpio_direction(gpio, false);
}
void direction_input(int gpio)
{
_driver.set_gpio_direction(gpio, true);
}
void dataout(int gpio, bool enable)
{
_driver.set_gpio_dataout(gpio, enable);
}
int datain(int gpio) { return _driver.get_gpio_datain(gpio); }
void debounce_enable(int gpio, bool enable)
{
_driver.set_gpio_debounce_enable(gpio, enable);
}
void debouncing_time(int gpio, unsigned int us)
{
_driver.set_gpio_debouncing_time(gpio, us);
}
void falling_detect(int gpio, bool enable)
{
_driver.set_gpio_falling_detect(gpio, enable);
}
void rising_detect(int gpio, bool enable)
{
_driver.set_gpio_rising_detect(gpio, enable);
}
void irq_enable(int gpio, bool enable)
{
_driver.set_gpio_irq_enable(gpio, enable);
}
void irq_sigh(Signal_context_capability cap, int gpio)
{
_driver.register_signal(cap, gpio);
}
};
int main(int, char **)
{
using namespace Gpio;
printf("--- i.MX53 gpio driver ---\n");
Driver driver;
Irq_handler gpio1l_irq(Driver::GPIO1L_IRQ, driver);
Irq_handler gpio1h_irq(Driver::GPIO1H_IRQ, driver);
Irq_handler gpio2l_irq(Driver::GPIO2L_IRQ, driver);
Irq_handler gpio2h_irq(Driver::GPIO2H_IRQ, driver);
Irq_handler gpio3l_irq(Driver::GPIO3L_IRQ, driver);
Irq_handler gpio3h_irq(Driver::GPIO3H_IRQ, driver);
Irq_handler gpio4l_irq(Driver::GPIO4L_IRQ, driver);
Irq_handler gpio4h_irq(Driver::GPIO4H_IRQ, driver);
Irq_handler gpio5l_irq(Driver::GPIO5L_IRQ, driver);
Irq_handler gpio5h_irq(Driver::GPIO5H_IRQ, driver);
Irq_handler gpio6l_irq(Driver::GPIO6L_IRQ, driver);
Irq_handler gpio6h_irq(Driver::GPIO6H_IRQ, driver);
Irq_handler gpio7l_irq(Driver::GPIO7L_IRQ, driver);
Irq_handler gpio7h_irq(Driver::GPIO7H_IRQ, driver);
/*
* Configure GPIO
* Example:
* <config>
* <gpio num="123" mode="I"/>
* <gpio num="124" mode="O" value="0"/>
* </config>
*
* num - GPIO pin number
* mode - input(I) or output(O)
* value - output level (1 or 0), only for output mode
*/
try {
Genode::Xml_node gpio_node = Genode::config()->xml_node().sub_node("gpio");
for (;; gpio_node = gpio_node.next("gpio")) {
unsigned num;
char mode[2] = {0};
unsigned value = 0;
bool value_ok;
do {
try {
gpio_node.attribute("num").value(&num);
}
catch (Genode::Xml_node::Nonexistent_attribute)
{
PERR("Missing \"num\" attribute. Ignore node.");
break;
}
try {
gpio_node.attribute("mode").value(mode, sizeof(mode));
}
catch (Genode::Xml_node::Nonexistent_attribute)
{
PERR("Missing \"mode\" attribute. Ignore node.");
break;
}
try {
value_ok = gpio_node.attribute("value").value(&value);
}
catch (Genode::Xml_node::Nonexistent_attribute)
{
value_ok = false;
}
if (mode[0] == 'O' || mode[0] == 'o') {
if (!value_ok) {
PERR("Missing \"value\" attribute for Output mode. Ignore node.");
break;
}
if (value > 1) {
PERR("Incorrect \"value\" attribute for Output mode. Ignore node.");
break;
}
driver.set_gpio_dataout(num, value);
driver.set_gpio_direction(num, false);
} else if (mode[0] == 'I' || mode[0] == 'i') {
driver.set_gpio_direction(num, true);
} else {
PERR("Incorrect value of \"mode\" attribute. Ignore node.");
break;
}
PDBG("gpio %d mode %s value=%s",
num, mode, value_ok ? (value==0 ? "0" : value==1 ? "1" : "error") : "-");
} while (0);
if (gpio_node.is_last("gpio")) break;
}
}
catch (Genode::Xml_node::Nonexistent_sub_node) {
PERR("No GPIO config");
}
/*
* Initialize server entry point
*/
enum { STACK_SIZE = 4096 };
static Cap_connection cap;
static Rpc_entrypoint ep(&cap, STACK_SIZE, "gpio_ep");
/*
* Let the entry point serve the gpio session and root interfaces
*/
static Session_component gpio_session(driver);
static Static_root<Gpio::Session> gpio_root(ep.manage(&gpio_session));
/*
* Announce service
*/
env()->parent()->announce(ep.manage(&gpio_root));
Genode::sleep_forever();
return 0;
}

8
os/src/drivers/gpio/imx53/target.mk Normal file
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@ -0,0 +1,8 @@
TARGET = gpio_drv
REQUIRES = imx53
SRC_CC = main.cc
LIBS = base
INC_DIR += $(PRG_DIR)
vpath main.cc $(PRG_DIR)