2013-06-14 11:53:41 +00:00
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/*
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2015-02-24 13:53:15 +00:00
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* \brief Regulator definitions for Exynos5
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2013-06-14 11:53:41 +00:00
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* \author Stefan Kalkowski <stefan.kalkowski@genode-labs.com>
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* \date 2013-06-13
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*/
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/*
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* Copyright (C) 2013 Genode Labs GmbH
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*
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* This file is part of the Genode OS framework, which is distributed
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* under the terms of the GNU General Public License version 2.
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*/
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2015-09-03 12:55:05 +00:00
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#ifndef _INCLUDE__SPEC__EXYNOS5__REGULATOR__CONSTS_H_
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#define _INCLUDE__SPEC__EXYNOS5__REGULATOR__CONSTS_H_
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2013-06-14 11:53:41 +00:00
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#include <util/string.h>
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namespace Regulator {
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enum Regulator_id {
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CLK_CPU,
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2013-06-18 09:15:47 +00:00
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CLK_SATA,
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CLK_USB30,
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2013-06-24 15:54:16 +00:00
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CLK_USB20,
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2013-06-20 14:00:24 +00:00
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CLK_MMC0,
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2013-10-08 16:04:45 +00:00
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CLK_HDMI,
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2013-06-18 09:15:47 +00:00
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PWR_SATA,
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PWR_USB30,
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2013-06-24 15:54:16 +00:00
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PWR_USB20,
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2013-10-08 16:04:45 +00:00
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PWR_HDMI,
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2013-06-14 11:53:41 +00:00
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MAX,
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INVALID
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};
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struct Regulator_name {
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Regulator_id id;
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const char * name;
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};
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2017-01-04 14:25:21 +00:00
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static constexpr Regulator_name names[] = {
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2013-10-08 16:04:45 +00:00
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{ CLK_CPU, "clock-cpu" },
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{ CLK_SATA, "clock-sata" },
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{ CLK_USB30, "clock-usb3.0" },
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{ CLK_USB20, "clock-usb2.0" },
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{ CLK_MMC0, "clock-mmc0" },
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{ CLK_HDMI, "clock-hdmi" },
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{ PWR_SATA, "power-sata" },
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{ PWR_USB30, "power-usb3.0" },
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{ PWR_USB20, "power-usb2.0" },
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{ PWR_HDMI, "power-hdmi"},
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2013-06-14 11:53:41 +00:00
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};
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2017-01-04 14:25:21 +00:00
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inline Regulator_id regulator_id_by_name(const char * name)
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2013-06-14 11:53:41 +00:00
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{
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2013-08-27 15:00:47 +00:00
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for (unsigned i = 0; i < sizeof(names)/sizeof(names[0]); i++)
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2013-06-14 11:53:41 +00:00
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if (Genode::strcmp(names[i].name, name) == 0)
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return names[i].id;
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return INVALID;
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}
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2017-01-04 14:25:21 +00:00
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inline const char * regulator_name_by_id(Regulator_id id) {
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2013-08-27 15:00:47 +00:00
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return (id < sizeof(names)/sizeof(names[0])) ? names[id].name : 0; }
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2013-06-14 11:53:41 +00:00
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/***************************************
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** Device specific level definitions **
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***************************************/
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enum Cpu_clock_freq {
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2013-06-24 11:08:33 +00:00
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CPU_FREQ_200 = 200000000,
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CPU_FREQ_400 = 400000000,
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CPU_FREQ_600 = 600000000,
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CPU_FREQ_800 = 800000000,
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CPU_FREQ_1000 = 1000000000,
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CPU_FREQ_1200 = 1200000000,
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CPU_FREQ_1400 = 1400000000,
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CPU_FREQ_1600 = 1600000000,
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CPU_FREQ_1700 = 1700000000,
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/* warning: 1700 not recommended by the reference manual
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we just insert this for performance measurement against
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Linux, which uses this overclocking */
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2013-06-14 11:53:41 +00:00
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};
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}
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2015-09-03 12:55:05 +00:00
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#endif /* _INCLUDE__SPEC__EXYNOS5__REGULATOR__CONSTS_H_ */
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