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5f77abf9b0
It's been a while since RISC-V support was added to CT-NG in 2017. Since then RISC-V support was integrated in all the key toolchain components upstream and now are proven to be in a very good state. Thus it makes no sense to keep this architecture "hidden" in experimental options, so we promote RISC-V architecture in CT-NG. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
20 lines
570 B
Plaintext
20 lines
570 B
Plaintext
# RISC-V specific config options
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## no-package
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##
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## select ARCH_SUPPORTS_32
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## select ARCH_SUPPORTS_64
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## select ARCH_DEFAULT_32
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## select ARCH_SUPPORTS_BOTH_MMU
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## select ARCH_SUPPORTS_WITH_ABI
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## select ARCH_SUPPORTS_WITH_ARCH
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## select ARCH_SUPPORTS_WITH_TUNE
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## select ARCH_SUPPORTS_LIBSANITIZER if ARCH_64
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## select GCC_REQUIRE_7_or_later
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## select BINUTILS_REQUIRE_2_28_or_later
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## select GDB_REQUIRE_8_0_or_later if DEBUG_GDB
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## select GLIBC_REQUIRE_2_29_or_later if LIBC_GLIBC
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## help The RISC-V architecture, as defined by:
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## help http://www.riscv.org/
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