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RISC-V: Remove EXPERIMENTAL tag
It's been a while since RISC-V support was added to CT-NG in 2017. Since then RISC-V support was integrated in all the key toolchain components upstream and now are proven to be in a very good state. Thus it makes no sense to keep this architecture "hidden" in experimental options, so we promote RISC-V architecture in CT-NG. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
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# RISC-V specific config options
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## no-package
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## depends on EXPERIMENTAL
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##
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## select ARCH_SUPPORTS_32
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## select ARCH_SUPPORTS_64
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CT_CONFIG_VERSION="4"
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CT_EXPERIMENTAL=y
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CT_ARCH_RISCV=y
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CT_ARCH_ARCH="rv32ima"
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CT_ARCH_ABI="ilp32"
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CT_CONFIG_VERSION="4"
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CT_EXPERIMENTAL=y
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CT_ARCH_RISCV=y
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CT_MULTILIB=y
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CT_ARCH_ARCH="rv32imac_zicsr_zifencei"
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CT_CONFIG_VERSION="4"
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CT_EXPERIMENTAL=y
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CT_ARCH_RISCV=y
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CT_TARGET_VENDOR=""
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CT_LIBC_NONE=y
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CT_CONFIG_VERSION="4"
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CT_EXPERIMENTAL=y
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CT_ARCH_RISCV=y
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CT_MULTILIB=y
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CT_ARCH_USE_MMU=y
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CT_CONFIG_VERSION="4"
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CT_EXPERIMENTAL=y
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CT_ARCH_RISCV=y
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# CT_DEMULTILIB is not set
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CT_ARCH_USE_MMU=y
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CT_CONFIG_VERSION="4"
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CT_EXPERIMENTAL=y
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CT_ARCH_RISCV=y
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# CT_DEMULTILIB is not set
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CT_ARCH_USE_MMU=y
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