It's been a while since RISC-V support was added to CT-NG in 2017.
Since then RISC-V support was integrated in all the key toolchain
components upstream and now are proven to be in a very good state.
Thus it makes no sense to keep this architecture "hidden" in
experimental options, so we promote RISC-V architecture in CT-NG.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
*-moxie*: DTC_VERBOSE is a wobbler, it depends on whether dtc is enabled
on the host machine (if dtc is installed, DTC defaults to 'n' and hence
prevents DTC_VERBOSE from appearing at all). Remove the option from
config file so that its value reverts to the default.
xtensa-fsf-elf: mark configuration obsolete so that it can use GDB 8.1
(it uses custom sources and needs to select the version therein)
Signed-off-by: Alexey Neyman <stilor@att.net>
We've had very solid support for C++ for quite a while now in RISC-V
land, at least in our Linux targets. This patch set enables C++ support
by default, which I assume most users will want.
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
- Pin sparc-leon-linux-gnu to GCC6, again.
- Remove "brokenness" explanation from moxie-elf comment (was only
applicable to stage-2 compiler, not final).
Signed-off-by: Alexey Neyman <stilor@att.net>
This sample works well for the SiFive U540 device (and similar).
Thanks to Jim Wilson <jimw@sifive.com> for his review, discovering
several bugs (now fixed).
Cc: Jim Wilson <jimw@sifive.com>
Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
