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enable SSE<->GPR moves when size matches word size
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78d9e51b7e
commit
38bf29300f
@ -364,7 +364,8 @@ class Assembler {
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unsigned bSize, uint8_t* bTypeMask, uint64_t* bRegisterMask) = 0;
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unsigned bSize, uint8_t* bTypeMask, uint64_t* bRegisterMask) = 0;
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virtual void planMove
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virtual void planMove
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(uint8_t srcTypeMask, uint64_t srcRegisterMask,
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(unsigned size,
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uint8_t srcTypeMask, uint64_t srcRegisterMask,
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uint8_t dstTypeMask, uint64_t dstRegisterMask,
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uint8_t dstTypeMask, uint64_t dstRegisterMask,
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uint8_t* tmpTypeMask, uint64_t* tmpRegisterMask) = 0;
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uint8_t* tmpTypeMask, uint64_t* tmpRegisterMask) = 0;
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@ -2520,7 +2520,8 @@ move(Context* c, Value* value, Site* src, Site* dst)
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uint8_t tmpTypeMask;
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uint8_t tmpTypeMask;
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uint64_t tmpRegisterMask;
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uint64_t tmpRegisterMask;
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c->arch->planMove
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c->arch->planMove
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(1 << src->type(c), src->registerMask(c),
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(value->nextWord == value ? BytesPerWord : 8,
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1 << src->type(c), src->registerMask(c),
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1 << dst->type(c), dst->registerMask(c),
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1 << dst->type(c), dst->registerMask(c),
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&tmpTypeMask, &tmpRegisterMask);
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&tmpTypeMask, &tmpRegisterMask);
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11
src/x86.cpp
11
src/x86.cpp
@ -3024,7 +3024,8 @@ class MyArchitecture: public Assembler::Architecture {
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}
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}
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virtual void planMove
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virtual void planMove
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(uint8_t srcTypeMask, uint64_t srcRegisterMask,
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(unsigned size,
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uint8_t srcTypeMask, uint64_t srcRegisterMask,
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uint8_t dstTypeMask, uint64_t dstRegisterMask,
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uint8_t dstTypeMask, uint64_t dstRegisterMask,
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uint8_t* tmpTypeMask, uint64_t* tmpRegisterMask)
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uint8_t* tmpTypeMask, uint64_t* tmpRegisterMask)
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{
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{
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@ -3040,10 +3041,12 @@ class MyArchitecture: public Assembler::Architecture {
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| (static_cast<uint64_t>(GeneralRegisterMask) << 32);
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| (static_cast<uint64_t>(GeneralRegisterMask) << 32);
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} else if (dstTypeMask & (1 << RegisterOperand)) {
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} else if (dstTypeMask & (1 << RegisterOperand)) {
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if (srcTypeMask & (1 << RegisterOperand)) {
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if (srcTypeMask & (1 << RegisterOperand)) {
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if (((dstRegisterMask & FloatRegisterMask) == 0)
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if (size != BytesPerWord
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xor ((srcRegisterMask & FloatRegisterMask) == 0))
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and (((dstRegisterMask & FloatRegisterMask) == 0)
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xor ((srcRegisterMask & FloatRegisterMask) == 0)))
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{
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{
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// can't move directly from FPR to GPR or vice-versa
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// can't move directly from FPR to GPR or vice-versa for
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// values larger than the GPR size
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*tmpTypeMask = (1 << MemoryOperand);
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*tmpTypeMask = (1 << MemoryOperand);
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*tmpRegisterMask = 0;
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*tmpRegisterMask = 0;
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}
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}
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