From 38bf29300f4832a6af56e95f0ce81cec22b3d00b Mon Sep 17 00:00:00 2001 From: Joel Dice Date: Sat, 10 Oct 2009 22:27:35 +0000 Subject: [PATCH] enable SSE<->GPR moves when size matches word size --- src/assembler.h | 3 ++- src/compiler.cpp | 3 ++- src/x86.cpp | 11 +++++++---- 3 files changed, 11 insertions(+), 6 deletions(-) diff --git a/src/assembler.h b/src/assembler.h index 486f487cc9..f71faef32d 100644 --- a/src/assembler.h +++ b/src/assembler.h @@ -364,7 +364,8 @@ class Assembler { unsigned bSize, uint8_t* bTypeMask, uint64_t* bRegisterMask) = 0; virtual void planMove - (uint8_t srcTypeMask, uint64_t srcRegisterMask, + (unsigned size, + uint8_t srcTypeMask, uint64_t srcRegisterMask, uint8_t dstTypeMask, uint64_t dstRegisterMask, uint8_t* tmpTypeMask, uint64_t* tmpRegisterMask) = 0; diff --git a/src/compiler.cpp b/src/compiler.cpp index 64a705e2cc..1f8969294e 100644 --- a/src/compiler.cpp +++ b/src/compiler.cpp @@ -2520,7 +2520,8 @@ move(Context* c, Value* value, Site* src, Site* dst) uint8_t tmpTypeMask; uint64_t tmpRegisterMask; c->arch->planMove - (1 << src->type(c), src->registerMask(c), + (value->nextWord == value ? BytesPerWord : 8, + 1 << src->type(c), src->registerMask(c), 1 << dst->type(c), dst->registerMask(c), &tmpTypeMask, &tmpRegisterMask); diff --git a/src/x86.cpp b/src/x86.cpp index b4300452a2..f0ea40be2c 100644 --- a/src/x86.cpp +++ b/src/x86.cpp @@ -3024,7 +3024,8 @@ class MyArchitecture: public Assembler::Architecture { } virtual void planMove - (uint8_t srcTypeMask, uint64_t srcRegisterMask, + (unsigned size, + uint8_t srcTypeMask, uint64_t srcRegisterMask, uint8_t dstTypeMask, uint64_t dstRegisterMask, uint8_t* tmpTypeMask, uint64_t* tmpRegisterMask) { @@ -3040,10 +3041,12 @@ class MyArchitecture: public Assembler::Architecture { | (static_cast(GeneralRegisterMask) << 32); } else if (dstTypeMask & (1 << RegisterOperand)) { if (srcTypeMask & (1 << RegisterOperand)) { - if (((dstRegisterMask & FloatRegisterMask) == 0) - xor ((srcRegisterMask & FloatRegisterMask) == 0)) + if (size != BytesPerWord + and (((dstRegisterMask & FloatRegisterMask) == 0) + xor ((srcRegisterMask & FloatRegisterMask) == 0))) { - // can't move directly from FPR to GPR or vice-versa + // can't move directly from FPR to GPR or vice-versa for + // values larger than the GPR size *tmpTypeMask = (1 << MemoryOperand); *tmpRegisterMask = 0; }