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enable SSE<->GPR moves when size matches word size

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This commit is contained in:
Joel Dice 2009-10-10 22:27:35 +00:00
parent 78d9e51b7e
commit 38bf29300f
3 changed files with 11 additions and 6 deletions
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3
src/assembler.h
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@ -364,7 +364,8 @@ class Assembler {
unsigned bSize, uint8_t* bTypeMask, uint64_t* bRegisterMask) = 0;
virtual void planMove
(uint8_t srcTypeMask, uint64_t srcRegisterMask,
(unsigned size,
uint8_t srcTypeMask, uint64_t srcRegisterMask,
uint8_t dstTypeMask, uint64_t dstRegisterMask,
uint8_t* tmpTypeMask, uint64_t* tmpRegisterMask) = 0;

3
src/compiler.cpp
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@ -2520,7 +2520,8 @@ move(Context* c, Value* value, Site* src, Site* dst)
uint8_t tmpTypeMask;
uint64_t tmpRegisterMask;
c->arch->planMove
(1 << src->type(c), src->registerMask(c),
(value->nextWord == value ? BytesPerWord : 8,
1 << src->type(c), src->registerMask(c),
1 << dst->type(c), dst->registerMask(c),
&tmpTypeMask, &tmpRegisterMask);

11
src/x86.cpp
View File

@ -3024,7 +3024,8 @@ class MyArchitecture: public Assembler::Architecture {
}
virtual void planMove
(uint8_t srcTypeMask, uint64_t srcRegisterMask,
(unsigned size,
uint8_t srcTypeMask, uint64_t srcRegisterMask,
uint8_t dstTypeMask, uint64_t dstRegisterMask,
uint8_t* tmpTypeMask, uint64_t* tmpRegisterMask)
{
@ -3040,10 +3041,12 @@ class MyArchitecture: public Assembler::Architecture {
| (static_cast<uint64_t>(GeneralRegisterMask) << 32);
} else if (dstTypeMask & (1 << RegisterOperand)) {
if (srcTypeMask & (1 << RegisterOperand)) {
if (((dstRegisterMask & FloatRegisterMask) == 0)
xor ((srcRegisterMask & FloatRegisterMask) == 0))
if (size != BytesPerWord
and (((dstRegisterMask & FloatRegisterMask) == 0)
xor ((srcRegisterMask & FloatRegisterMask) == 0)))
{
// can't move directly from FPR to GPR or vice-versa
// can't move directly from FPR to GPR or vice-versa for
// values larger than the GPR size
*tmpTypeMask = (1 << MemoryOperand);
*tmpRegisterMask = 0;
}