mirror of
https://github.com/ggerganov/whisper.cpp.git
synced 2024-12-19 12:47:52 +00:00
2948c740a2
* sync : update scripts * sync : ggml * talk-llama : sync llama.cpp * make : WHISPER_CUBLAS -> WHISPER_CUDA * ci : try to fix sycl build * talk-llama : fix make build
95 lines
3.2 KiB
Plaintext
95 lines
3.2 KiB
Plaintext
#include "pool2d.cuh"
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template <typename Ti, typename To>
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static __global__ void pool2d_nchw_kernel(
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const int ih, const int iw, const int oh, const int ow,
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const int kh, const int kw, const int sh, const int sw,
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const int ph, const int pw, const int parallel_elements,
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const Ti* src, To* dst, const enum ggml_op_pool op) {
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int idx = threadIdx.x + blockIdx.x * blockDim.x;
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if (idx >= parallel_elements) {
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return;
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}
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const int I_HW = ih * iw;
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const int O_HW = oh * ow;
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const int nc = idx / O_HW;
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const int cur_oh = idx % O_HW / ow;
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const int cur_ow = idx % O_HW % ow;
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const Ti* i_ptr = src + nc * I_HW;
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To* o_ptr = dst + nc * O_HW;
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const int start_h = cur_oh * sh - ph;
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const int bh = max(0, start_h);
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const int eh = min(ih, start_h + kh);
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const int start_w = cur_ow * sw - pw;
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const int bw = max(0, start_w);
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const int ew = min(iw, start_w + kw);
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const To scale = 1. / (kh * kw);
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To res = 0;
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switch (op) {
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case GGML_OP_POOL_AVG: res = 0; break;
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case GGML_OP_POOL_MAX: res = -FLT_MAX; break;
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default: assert(false);
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}
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for (int i = bh; i < eh; i += 1) {
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for (int j = bw; j < ew; j += 1) {
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#if __CUDA_ARCH__ >= 350
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Ti cur = __ldg(i_ptr + i * iw + j);
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#else
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Ti cur = i_ptr[i * iw + j];
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#endif
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switch (op) {
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case GGML_OP_POOL_AVG: res += cur * scale; break;
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case GGML_OP_POOL_MAX: res = max(res, (To)cur); break;
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default: assert(false);
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}
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}
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}
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o_ptr[cur_oh * ow + cur_ow] = res;
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}
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static void pool2d_nchw_kernel_f32_f32_cuda(
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const int ih, const int iw, const int oh, const int ow,
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const int kh, const int kw, const int sh, const int sw,
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const int ph, const int pw, const int parallel_elements,
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const float * src, float * dst, const enum ggml_op_pool op,
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cudaStream_t stream) {
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const int num_blocks = (parallel_elements + CUDA_POOL2D_BLOCK_SIZE - 1) / CUDA_POOL2D_BLOCK_SIZE;
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dim3 block_nums(num_blocks);
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pool2d_nchw_kernel<<<block_nums, CUDA_POOL2D_BLOCK_SIZE, 0, stream>>>(ih, iw, oh, ow, kh, kw, sh, sw, ph, pw, parallel_elements, src, dst, op);
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}
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void ggml_cuda_op_pool2d(ggml_backend_cuda_context & ctx, ggml_tensor * dst) {
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const ggml_tensor * src0 = dst->src[0];
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const float * src0_d = (const float *)src0->data;
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float * dst_d = (float *)dst->data;
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cudaStream_t stream = ctx.stream();
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GGML_ASSERT(src0->type == GGML_TYPE_F32);
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GGML_ASSERT( dst->type == GGML_TYPE_F32);
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const int32_t * opts = (const int32_t *)dst->op_params;
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enum ggml_op_pool op = static_cast<ggml_op_pool>(opts[0]);
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const int k0 = opts[1];
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const int k1 = opts[2];
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const int s0 = opts[3];
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const int s1 = opts[4];
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const int p0 = opts[5];
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const int p1 = opts[6];
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const int64_t IH = src0->ne[1];
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const int64_t IW = src0->ne[0];
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const int64_t N = dst->ne[3];
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const int64_t OC = dst->ne[2];
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const int64_t OH = dst->ne[1];
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const int64_t OW = dst->ne[0];
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const int parallel_elements = N * OC * OH * OW;
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pool2d_nchw_kernel_f32_f32_cuda(IH, IW, OH, OW, k1, k0, s1, s0, p1, p0, parallel_elements, src0_d, dst_d, op, stream);
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}
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