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sycl: quantize and reorder the input to q8_1 when reorder is enabled (llama/13826)
* [WIP]: fuse q8 quantization and reorder * wip2: fuse q8 quantization and reorder * working q8 reorder commit * restored common.hpp * remove debug prints * remove unnecessary headers and remove trailing whitespace * Update ggml/src/ggml-sycl/ggml-sycl.cpp Co-authored-by: Alberto Cabrera Pérez <alberto.cabrera@intel.com> --------- Co-authored-by: Alberto Cabrera Pérez <alberto.cabrera@intel.com>
This commit is contained in:
committed by
Georgi Gerganov
parent
9589645e72
commit
ef2a79d2b8
@ -1434,6 +1434,59 @@ static void quantize_q8_1(const float * __restrict__ x, void * __restrict__ vy,
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reinterpret_cast<sycl::half &>(y[ib].ds.y()) = sum;
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}
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template <int ElementsPerWI>
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static __dpct_inline__ void quantize_and_reorder_q8_1(const float * __restrict__ x, void * reordered_q8_tensor,
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const int kx, const int kx_padded, const sycl::nd_item<1> & it) {
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/*
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Quantizes and reorders the resultant q8 tensor in a per row fashion
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Each sub-group calculates one quant block. i.e. QK8_1 quant values and the d and sum values
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*/
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auto subgroup_id = it.get_group(0);
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auto wi_id = it.get_local_id(0);
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const int num_blocks_per_row = kx / QK8_1;
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auto row = subgroup_id / num_blocks_per_row;
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auto col = subgroup_id % num_blocks_per_row;
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auto row_offset = row * (kx_padded / QK8_1) * sizeof(block_q8_1);
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auto col_offset = QK8_1 * col + wi_id * ElementsPerWI;
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auto quant_ptr = (int8_t *) ((char *) reordered_q8_tensor + row_offset + col_offset);
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auto ds_ptr = (sycl::half2 *) ((char *) reordered_q8_tensor + row_offset + kx + col * sizeof(sycl::half2));
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sycl::vec<float, ElementsPerWI> wi_f32_vals;
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sycl::vec<int8_t, ElementsPerWI> quantized_values;
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auto float_ptr_offset = subgroup_id * QK8_1 + ElementsPerWI * wi_id;
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wi_f32_vals = *reinterpret_cast<const sycl::vec<float, ElementsPerWI> *>(x + float_ptr_offset);
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float sum = 0.0f;
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float amax = 0.0f;
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#pragma unroll(ElementsPerWI)
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for (int i = 0; i < ElementsPerWI; i++) {
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sum += wi_f32_vals[i];
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amax = sycl::fmax(amax, sycl::fabs(wi_f32_vals[i]));
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quantized_values[i] = 0;
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}
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sum = sycl::reduce_over_group(it.get_group(), sum, sycl::plus<float>());
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amax = sycl::reduce_over_group(it.get_group(), amax, sycl::maximum<float>());
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float d = amax == 0 ? 1 : amax / 127;
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#pragma unroll(ElementsPerWI)
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for (int i = 0; i < ElementsPerWI; i++) {
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quantized_values[i] = sycl::round(wi_f32_vals[i] / d);
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}
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d = amax == 0 ? 0 : d;
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*reinterpret_cast<sycl::vec<int8_t, ElementsPerWI> *>(quant_ptr) = quantized_values;
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if (wi_id == 0) {
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*ds_ptr = sycl::half2(sycl::half(d), sycl::half(sum));
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}
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}
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static void mul_mat_p021_f16_f32(
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const void * __restrict__ vx, const float * __restrict__ y, float * __restrict__ dst,
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const int ncols_x, const int nrows_x, const int nchannels_x, const int nchannels_y,
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@ -1718,23 +1771,30 @@ static void pool2d_nchw_kernel(
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o_ptr[cur_oh * ow + cur_ow] = res;
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}
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static void quantize_row_q8_1_sycl(const float *x, void *vy, const int kx,
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const int ky, const int kx_padded,
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queue_ptr stream) {
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const int block_num_x = (kx_padded + SYCL_QUANTIZE_BLOCK_SIZE - 1) / SYCL_QUANTIZE_BLOCK_SIZE;
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const sycl::range<3> num_blocks(1, ky, block_num_x);
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int constexpr QUANT_BLOCK_TILE = QK8_1 / WARP_SIZE;
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static_assert(QK8_1 % WARP_SIZE == 0);
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const sycl::range<3> block_size(1, 1, SYCL_QUANTIZE_BLOCK_SIZE / QUANT_BLOCK_TILE);
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{
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dpct::has_capability_or_fail(stream->get_device(),
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{sycl::aspect::fp16});
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static void quantize_row_q8_1_sycl(const float * x, void * vy, const int kx, const int ky, const int kx_padded,
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bool reorder_q8_tensor, queue_ptr stream) {
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if (reorder_q8_tensor) {
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auto local_range = std::size_t(WARP_SIZE);
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auto num_quant_blocks = ky * (kx / QK8_1);
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auto global_range = num_quant_blocks * local_range;
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stream->parallel_for(sycl::nd_range<1>({ global_range }, { local_range }),
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[=](sycl::nd_item<1> it) [[sycl::reqd_sub_group_size(WARP_SIZE)]] {
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quantize_and_reorder_q8_1<QK8_1 / WARP_SIZE>(x, vy, kx, kx_padded, it);
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});
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} else {
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const int block_num_x = (kx_padded + SYCL_QUANTIZE_BLOCK_SIZE - 1) / SYCL_QUANTIZE_BLOCK_SIZE;
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const sycl::range<3> num_blocks(1, ky, block_num_x);
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int constexpr QUANT_BLOCK_TILE = QK8_1 / WARP_SIZE;
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static_assert(QK8_1 % WARP_SIZE == 0);
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const sycl::range<3> block_size(1, 1, SYCL_QUANTIZE_BLOCK_SIZE / QUANT_BLOCK_TILE);
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{
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dpct::has_capability_or_fail(stream->get_device(), { sycl::aspect::fp16 });
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stream->parallel_for(
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sycl::nd_range<3>(num_blocks * block_size, block_size),
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[=](sycl::nd_item<3> item_ct1) [[sycl::reqd_sub_group_size(WARP_SIZE)]] {
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quantize_q8_1<QUANT_BLOCK_TILE>(x, vy, kx, kx_padded, item_ct1);
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});
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stream->parallel_for(sycl::nd_range<3>(num_blocks * block_size, block_size),
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[=](sycl::nd_item<3> item_ct1) [[sycl::reqd_sub_group_size(WARP_SIZE)]] {
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quantize_q8_1<QUANT_BLOCK_TILE>(x, vy, kx, kx_padded, item_ct1);
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});
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}
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}
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}
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@ -2446,9 +2506,10 @@ static void ggml_sycl_op_mul_mat(ggml_backend_sycl_context & ctx, const ggml_ten
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dev[i].src1_ddq = dev[i].src1_ddq_alloc.alloc(ctx.pool(i), nrows1*src1_padded_col_size*q8_1_ts/q8_1_bs);
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if (src1_on_device && src1_is_contiguous) {
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bool reorder_q8_tensor = src0->extra && ((ggml_tensor_extra_gpu *)src0->extra)->optimized_feature.reorder;
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scope_op_debug_print scope_dbg_print(__func__, "/quantize_row_q8_1_sycl", dst,
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/*num_src=*/2, " : converting src1 to Q8_1");
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quantize_row_q8_1_sycl(dev[i].src1_ddf, dev[i].src1_ddq, ne10, nrows1, src1_padded_col_size, stream);
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quantize_row_q8_1_sycl(dev[i].src1_ddf, dev[i].src1_ddq, ne10, nrows1, src1_padded_col_size, reorder_q8_tensor, stream);
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/*
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DPCT1010:90: SYCL uses exceptions to report errors and does not
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use the error codes. The call was replaced with 0. You need to
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@ -2554,7 +2615,7 @@ static void ggml_sycl_op_mul_mat(ggml_backend_sycl_context & ctx, const ggml_ten
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if (convert_src1_to_q8_1 && !src1_is_contiguous) {
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scope_op_debug_print scope_dbg_print(__func__, "/quantize_row_q8_1_sycl", dst,
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/*num_src=*/2, " : converting src1 to Q8_1");
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quantize_row_q8_1_sycl(src1_ddf_i, src1_ddq_i, ne10, src1_ncols, src1_padded_col_size, stream);
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quantize_row_q8_1_sycl(src1_ddf_i, src1_ddq_i, ne10, src1_ncols, src1_padded_col_size, false, stream);
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/*
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DPCT1010:92: SYCL uses exceptions to report errors and does
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not use the error codes. The call was replaced with 0. You
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