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CUDA: enable Gemma FA for HIP/Pascal (llama/9581)
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@ -2976,19 +2976,19 @@ GGML_CALL static bool ggml_backend_cuda_supports_op(ggml_backend_t backend, cons
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case GGML_OP_LEAKY_RELU:
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case GGML_OP_LEAKY_RELU:
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case GGML_OP_RWKV_WKV:
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case GGML_OP_RWKV_WKV:
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return true;
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return true;
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case GGML_OP_FLASH_ATTN_EXT:
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case GGML_OP_FLASH_ATTN_EXT: {
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#if defined(GGML_USE_HIPBLAS) && defined(__HIP_PLATFORM_AMD__)
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return (op->src[0]->ne[0] == 64 && op->src[1]->type == GGML_TYPE_F16) || op->src[0]->ne[0] == 128;
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#else
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if (op->src[0]->ne[0] == 128) {
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return true;
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}
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if (op->src[0]->ne[0] == 64 && op->src[1]->type == GGML_TYPE_F16) {
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if (op->src[0]->ne[0] == 64 && op->src[1]->type == GGML_TYPE_F16) {
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return true;
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return true;
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}
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}
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return ggml_cuda_info().devices[cuda_ctx->device].cc >= CC_VOLTA &&
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if (op->src[0]->ne[0] == 128) {
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op->src[1]->type == GGML_TYPE_F16 && op->src[2]->type == GGML_TYPE_F16;
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return true;
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#endif // defined(GGML_USE_HIPBLAS) && defined(__HIP_PLATFORM_AMD__)
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}
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if (op->src[0]->ne[0] == 256 && op->src[1]->type == GGML_TYPE_F16 && op->src[2]->type == GGML_TYPE_F16) {
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return true;
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}
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const int cc = ggml_cuda_info().devices[cuda_ctx->device].cc;
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return cc >= CC_VOLTA && cc < CC_OFFSET_AMD && op->src[1]->type == GGML_TYPE_F16 && op->src[2]->type == GGML_TYPE_F16;
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}
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case GGML_OP_CROSS_ENTROPY_LOSS:
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case GGML_OP_CROSS_ENTROPY_LOSS:
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case GGML_OP_CROSS_ENTROPY_LOSS_BACK:
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case GGML_OP_CROSS_ENTROPY_LOSS_BACK:
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case GGML_OP_OPT_STEP_ADAMW:
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case GGML_OP_OPT_STEP_ADAMW:
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@ -314,7 +314,7 @@ void ggml_cuda_flash_attn_ext(ggml_backend_cuda_context & ctx, ggml_tensor * dst
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}
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}
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if (!fast_fp16_available(cc)) {
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if (!fast_fp16_available(cc)) {
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if (Q->ne[1] <= 8) {
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if (Q->ne[1] <= 8 || Q->ne[0] == 256) {
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ggml_cuda_flash_attn_ext_vec_f32(ctx, dst);
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ggml_cuda_flash_attn_ext_vec_f32(ctx, dst);
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} else {
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} else {
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ggml_cuda_flash_attn_ext_tile_f32(ctx, dst);
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ggml_cuda_flash_attn_ext_tile_f32(ctx, dst);
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