mirror of
https://github.com/ggerganov/whisper.cpp.git
synced 2024-12-24 06:46:37 +00:00
ggml : add predefined list of CPU backend variants to build (llama/10626)
* ggml : add predefined list of CPU backend variants to build * update CPU dockerfiles
This commit is contained in:
Diego Devesa
Georgi Gerganov
parent
904e307bce
commit
a815940e0e
@ -94,28 +94,31 @@ endif()
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option(GGML_CPU_HBM "ggml: use memkind for CPU HBM" OFF)
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option(GGML_CPU_AARCH64 "ggml: use runtime weight conversion of Q4_0 to Q4_X_X" ON)
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option(GGML_AVX "ggml: enable AVX" ${INS_ENB})
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option(GGML_AVX_VNNI "ggml: enable AVX-VNNI" OFF)
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option(GGML_AVX2 "ggml: enable AVX2" ${INS_ENB})
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option(GGML_AVX512 "ggml: enable AVX512" OFF)
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option(GGML_AVX512 "ggml: enable AVX512F" OFF)
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option(GGML_AVX512_VBMI "ggml: enable AVX512-VBMI" OFF)
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option(GGML_AVX512_VNNI "ggml: enable AVX512-VNNI" OFF)
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option(GGML_AVX512_BF16 "ggml: enable AVX512-BF16" OFF)
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if (NOT MSVC)
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# in MSVC F16C and FMA is implied with AVX2/AVX512
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option(GGML_FMA "ggml: enable FMA" ${INS_ENB})
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option(GGML_F16C "ggml: enable F16C" ${INS_ENB})
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# MSVC does not seem to support AMX
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option(GGML_AMX_TILE "ggml: enable AMX-TILE" OFF)
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option(GGML_AMX_INT8 "ggml: enable AMX-INT8" OFF)
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option(GGML_AMX_BF16 "ggml: enable AMX-BF16" OFF)
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option(GGML_FMA "ggml: enable FMA" ${INS_ENB})
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if (NOT MSVC)
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option(GGML_F16C "ggml: enable F16C" ${INS_ENB}) # in MSVC F16C is implied with AVX2/AVX512
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endif()
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option(GGML_LASX "ggml: enable lasx" ON)
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option(GGML_LSX "ggml: enable lsx" ON)
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option(GGML_RVV "ggml: enable rvv" ON)
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option(GGML_SVE "ggml: enable SVE" OFF)
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option(GGML_CPU_ALL_VARIANTS "ggml: build all variants of the CPU backend (requires GGML_BACKEND_DL)" OFF)
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if (WIN32)
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set(GGML_WIN_VER "0x602" CACHE STRING "ggml: Windows Version")
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set(GGML_WIN_VER "0x602" CACHE STRING "ggml: Windows version")
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endif()
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# ggml core
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@ -180,11 +183,7 @@ option(GGML_BUILD_EXAMPLES "ggml: build examples" ${GGML_STANDALONE})
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set(CMAKE_C_STANDARD 11)
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set(CMAKE_C_STANDARD_REQUIRED true)
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if (GGML_SYCL)
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set(CMAKE_CXX_STANDARD 17)
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else()
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set(CMAKE_CXX_STANDARD 11)
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endif()
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set(CMAKE_CXX_STANDARD_REQUIRED true)
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set(THREADS_PREFER_PTHREAD_FLAG ON)
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@ -269,7 +269,42 @@ function(ggml_add_backend backend)
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endif()
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endfunction()
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function(ggml_add_cpu_backend_variant tag_name)
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set(GGML_CPU_TAG_NAME ${tag_name})
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# other: OPENMP LLAMAFILE CPU_HBM
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foreach (feat NATIVE
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AVX AVX2 AVX_VNNI FMA F16C
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AVX512 AVX512_VBMI AVX512_VNNI AVX512_BF16
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AMX_TILE AMX_INT8 AMX_BF16)
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set(GGML_${feat} OFF)
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endforeach()
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foreach (feat ${ARGN})
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set(GGML_${feat} ON)
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endforeach()
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ggml_add_cpu_backend_variant_impl(${tag_name})
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endfunction()
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ggml_add_backend(CPU)
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if (GGML_CPU_ALL_VARIANTS)
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if (NOT GGML_BACKEND_DL)
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message(FATAL_ERROR "GGML_CPU_ALL_VARIANTS requires GGML_BACKEND_DL")
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endif()
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ggml_add_cpu_backend_variant(sandybridge AVX)
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ggml_add_cpu_backend_variant(haswell AVX F16C AVX2 FMA)
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ggml_add_cpu_backend_variant(skylakex AVX F16C AVX2 FMA AVX512)
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ggml_add_cpu_backend_variant(icelake AVX F16C AVX2 FMA AVX512 AVX512_VBMI AVX512_VNNI)
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if (NOT MSVC)
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# MSVC doesn't support AVX-VNNI or AMX
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ggml_add_cpu_backend_variant(alderlake AVX F16C AVX2 FMA AVX_VNNI)
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ggml_add_cpu_backend_variant(sapphirerapids AVX F16C AVX2 FMA AVX512 AVX512_VBMI AVX512_VNNI AVX512_BF16 AMX_TILE AMX_INT8)
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endif()
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else ()
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ggml_add_cpu_backend_variant_impl("")
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endif()
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ggml_add_backend(BLAS)
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ggml_add_backend(CANN)
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ggml_add_backend(CUDA)
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@ -483,6 +483,10 @@ static ggml_backend_reg_t ggml_backend_load_best(const char * name, bool silent)
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best_score = s;
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best_path = entry.path().string();
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}
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} else {
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if (!silent) {
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GGML_LOG_INFO("%s: failed to find ggml_backend_score in %s\n", __func__, entry.path().string().c_str());
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}
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}
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}
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}
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@ -505,15 +509,21 @@ static ggml_backend_reg_t ggml_backend_load_best(const char * name, bool silent)
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}
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void ggml_backend_load_all() {
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ggml_backend_load_best("blas", true);
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ggml_backend_load_best("cann", true);
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ggml_backend_load_best("cuda", true);
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ggml_backend_load_best("hip", true);
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ggml_backend_load_best("kompute", true);
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ggml_backend_load_best("metal", true);
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ggml_backend_load_best("rpc", true);
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ggml_backend_load_best("sycl", true);
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ggml_backend_load_best("vulkan", true);
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ggml_backend_load_best("musa", true);
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ggml_backend_load_best("cpu", true);
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#ifdef NDEBUG
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bool silent = true;
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#else
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bool silent = false;
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#endif
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ggml_backend_load_best("blas", silent);
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ggml_backend_load_best("cann", silent);
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ggml_backend_load_best("cuda", silent);
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ggml_backend_load_best("hip", silent);
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ggml_backend_load_best("kompute", silent);
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ggml_backend_load_best("metal", silent);
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ggml_backend_load_best("rpc", silent);
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ggml_backend_load_best("sycl", silent);
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ggml_backend_load_best("vulkan", silent);
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ggml_backend_load_best("musa", silent);
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ggml_backend_load_best("cpu", silent);
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}
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@ -1,32 +1,39 @@
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ggml_add_backend_library(ggml-cpu)
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function(ggml_add_cpu_backend_variant_impl tag_name)
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if (tag_name)
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set(GGML_CPU_NAME ggml-cpu-${tag_name})
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else()
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set(GGML_CPU_NAME ggml-cpu)
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endif()
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ggml_add_backend_library(${GGML_CPU_NAME})
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list (APPEND GGML_CPU_SOURCES
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ggml-cpu.c
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ggml-cpu.cpp
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ggml-cpu-aarch64.c
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ggml-cpu-aarch64.h
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ggml-cpu-quants.c
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ggml-cpu-quants.h
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amx/amx.cpp
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amx/amx.h
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amx/mmq.cpp
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amx/mmq.h
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ggml-cpu-impl.h
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ggml-cpu/ggml-cpu.c
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ggml-cpu/ggml-cpu.cpp
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ggml-cpu/ggml-cpu-aarch64.c
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ggml-cpu/ggml-cpu-aarch64.h
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ggml-cpu/ggml-cpu-quants.c
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ggml-cpu/ggml-cpu-quants.h
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ggml-cpu/amx/amx.cpp
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ggml-cpu/amx/amx.h
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ggml-cpu/amx/mmq.cpp
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ggml-cpu/amx/mmq.h
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ggml-cpu/ggml-cpu-impl.h
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)
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target_compile_features(ggml-cpu PRIVATE c_std_11 cxx_std_17)
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target_include_directories(ggml-cpu PRIVATE .)
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target_compile_features(${GGML_CPU_NAME} PRIVATE c_std_11 cxx_std_17)
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target_include_directories(${GGML_CPU_NAME} PRIVATE . ggml-cpu)
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if (APPLE AND GGML_ACCELERATE)
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find_library(ACCELERATE_FRAMEWORK Accelerate)
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if (ACCELERATE_FRAMEWORK)
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message(STATUS "Accelerate framework found")
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target_compile_definitions(ggml-cpu PRIVATE GGML_USE_ACCELERATE)
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target_compile_definitions(ggml-cpu PRIVATE ACCELERATE_NEW_LAPACK)
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target_compile_definitions(ggml-cpu PRIVATE ACCELERATE_LAPACK_ILP64)
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target_compile_definitions(${GGML_CPU_NAME} PRIVATE GGML_USE_ACCELERATE)
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target_compile_definitions(${GGML_CPU_NAME} PRIVATE ACCELERATE_NEW_LAPACK)
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target_compile_definitions(${GGML_CPU_NAME} PRIVATE ACCELERATE_LAPACK_ILP64)
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target_link_libraries(ggml-cpu PRIVATE ${ACCELERATE_FRAMEWORK})
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target_link_libraries(${GGML_CPU_NAME} PRIVATE ${ACCELERATE_FRAMEWORK})
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else()
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message(WARNING "Accelerate framework not found")
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endif()
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@ -35,24 +42,20 @@ endif()
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if (GGML_OPENMP)
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find_package(OpenMP)
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if (OpenMP_FOUND)
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message(STATUS "OpenMP found")
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target_compile_definitions(${GGML_CPU_NAME} PRIVATE GGML_USE_OPENMP)
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target_compile_definitions(ggml-cpu PRIVATE GGML_USE_OPENMP)
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target_link_libraries(ggml-cpu PRIVATE OpenMP::OpenMP_C OpenMP::OpenMP_CXX)
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target_link_libraries(${GGML_CPU_NAME} PRIVATE OpenMP::OpenMP_C OpenMP::OpenMP_CXX)
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else()
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message(WARNING "OpenMP not found")
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endif()
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endif()
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if (GGML_LLAMAFILE)
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message(STATUS "Using llamafile")
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target_compile_definitions(ggml-cpu PRIVATE GGML_USE_LLAMAFILE)
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target_compile_definitions(${GGML_CPU_NAME} PRIVATE GGML_USE_LLAMAFILE)
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list(APPEND GGML_CPU_SOURCES
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llamafile/sgemm.cpp
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llamafile/sgemm.h)
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ggml-cpu/llamafile/sgemm.cpp
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ggml-cpu/llamafile/sgemm.h)
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endif()
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if (GGML_CPU_HBM)
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@ -60,9 +63,9 @@ if (GGML_CPU_HBM)
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message(STATUS "Using memkind for CPU HBM")
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target_compile_definitions(ggml-cpu PRIVATE GGML_USE_CPU_HBM)
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target_compile_definitions(${GGML_CPU_NAME} PRIVATE GGML_USE_CPU_HBM)
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target_link_libraries(ggml-cpu PUBLIC memkind)
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target_link_libraries(${GGML_CPU_NAME} PUBLIC memkind)
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endif()
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if (CMAKE_OSX_ARCHITECTURES STREQUAL "arm64" OR
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@ -173,18 +176,19 @@ if (CMAKE_OSX_ARCHITECTURES STREQUAL "arm64" OR
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elseif (CMAKE_OSX_ARCHITECTURES STREQUAL "x86_64" OR CMAKE_GENERATOR_PLATFORM_LWR MATCHES "^(x86_64|i686|amd64|x64|win32)$" OR
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(NOT CMAKE_OSX_ARCHITECTURES AND NOT CMAKE_GENERATOR_PLATFORM_LWR AND
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CMAKE_SYSTEM_PROCESSOR MATCHES "^(x86_64|i686|AMD64)$"))
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message(STATUS "x86 detected")
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if (MSVC)
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# instruction set detection for MSVC only
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if (GGML_NATIVE)
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include(cmake/FindSIMD.cmake)
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include(ggml-cpu/cmake/FindSIMD.cmake)
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endif ()
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if (GGML_AVX512)
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list(APPEND ARCH_FLAGS /arch:AVX512)
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# /arch:AVX512 includes: __AVX512F__, __AVX512CD__, __AVX512BW__, __AVX512DQ__, and __AVX512VL__
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# MSVC has no compile-time flags enabling specific
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# AVX512 extensions, neither it defines the
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# macros corresponding to the extensions.
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# Do it manually.
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list(APPEND ARCH_DEFINITIONS GGML_AVX512)
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if (GGML_AVX512_VBMI)
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list(APPEND ARCH_DEFINITIONS __AVX512VBMI__)
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if (CMAKE_C_COMPILER_ID STREQUAL "Clang")
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@ -192,78 +196,98 @@ elseif (CMAKE_OSX_ARCHITECTURES STREQUAL "x86_64" OR CMAKE_GENERATOR_PLATFORM_LW
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endif()
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endif()
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if (GGML_AVX512_VNNI)
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list(APPEND ARCH_DEFINITIONS __AVX512VNNI__)
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list(APPEND ARCH_DEFINITIONS __AVX512VNNI__ GGML_AVX512_VNNI)
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if (CMAKE_C_COMPILER_ID STREQUAL "Clang")
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list(APPEND ARCH_FLAGS -mavx512vnni)
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endif()
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endif()
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if (GGML_AVX512_BF16)
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list(APPEND ARCH_DEFINITIONS __AVX512BF16__)
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list(APPEND ARCH_DEFINITIONS __AVX512BF16__ GGML_AVX512_BF16)
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if (CMAKE_C_COMPILER_ID STREQUAL "Clang")
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list(APPEND ARCH_FLAGS -mavx512bf16)
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endif()
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endif()
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if (GGML_AMX_TILE)
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list(APPEND ARCH_DEFINITIONS __AMX_TILE__)
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list(APPEND ARCH_DEFINITIONS __AMX_TILE__ GGML_AMX_TILE)
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endif()
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if (GGML_AMX_INT8)
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list(APPEND ARCH_DEFINITIONS __AMX_INT8__)
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list(APPEND ARCH_DEFINITIONS __AMX_INT8__ GGML_AMX_INT8)
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endif()
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if (GGML_AMX_BF16)
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list(APPEND ARCH_DEFINITIONS __AMX_BF16__)
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list(APPEND ARCH_DEFINITIONS __AMX_BF16__ GGML_AMX_BF16)
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endif()
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elseif (GGML_AVX2)
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list(APPEND ARCH_FLAGS /arch:AVX2)
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list(APPEND ARCH_DEFINITIONS GGML_AVX2 GGML_FMA GGML_F16C)
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elseif (GGML_AVX)
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list(APPEND ARCH_FLAGS /arch:AVX)
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list(APPEND ARCH_DEFINITIONS GGML_AVX)
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else ()
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list(APPEND ARCH_FLAGS /arch:SSE4.2)
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list(APPEND ARCH_DEFINITIONS GGML_SSE42)
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endif()
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if (GGML_AVX_VNNI)
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list(APPEND ARCH_DEFINITIONS __AVXVNNI__)
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if (CMAKE_C_COMPILER_ID STREQUAL "Clang")
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list(APPEND ARCH_FLAGS -mavxvnni)
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endif()
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# MSVC generates AVX512 with AVX-VNNI intrinsics even with /arch:AVX2
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#list(APPEND ARCH_DEFINITIONS __AVXVNNI__ GGML_AVX_VNNI)
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endif()
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else ()
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if (GGML_NATIVE)
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list(APPEND ARCH_FLAGS -march=native)
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endif()
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else ()
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list(APPEND ARCH_FLAGS -msse4.2)
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list(APPEND ARCH_DEFINITIONS GGML_SSE42)
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if (GGML_F16C)
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list(APPEND ARCH_FLAGS -mf16c)
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list(APPEND ARCH_DEFINITIONS GGML_F16C)
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endif()
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if (GGML_FMA)
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list(APPEND ARCH_FLAGS -mfma)
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list(APPEND ARCH_DEFINITIONS GGML_FMA)
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endif()
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if (GGML_AVX)
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list(APPEND ARCH_FLAGS -mavx)
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list(APPEND ARCH_DEFINITIONS GGML_AVX)
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endif()
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if (GGML_AVX2)
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list(APPEND ARCH_FLAGS -mavx2)
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list(APPEND ARCH_DEFINITIONS GGML_AVX2)
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endif()
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if (GGML_AVX_VNNI)
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list(APPEND ARCH_FLAGS -mavxvnni)
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list(APPEND ARCH_DEFINITIONS GGML_AVX_VNNI)
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endif()
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if (GGML_AVX512)
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list(APPEND ARCH_FLAGS -mavx512f)
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list(APPEND ARCH_FLAGS -mavx512cd)
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list(APPEND ARCH_FLAGS -mavx512vl)
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list(APPEND ARCH_FLAGS -mavx512dq)
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list(APPEND ARCH_FLAGS -mavx512bw)
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list(APPEND ARCH_DEFINITIONS GGML_AVX512)
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endif()
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if (GGML_AVX512_VBMI)
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list(APPEND ARCH_FLAGS -mavx512vbmi)
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list(APPEND ARCH_DEFINITIONS GGML_AVX512_VBMI)
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endif()
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if (GGML_AVX512_VNNI)
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list(APPEND ARCH_FLAGS -mavx512vnni)
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list(APPEND ARCH_DEFINITIONS GGML_AVX512_VNNI)
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endif()
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if (GGML_AVX512_BF16)
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list(APPEND ARCH_FLAGS -mavx512bf16)
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list(APPEND ARCH_DEFINITIONS GGML_AVX512_BF16)
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endif()
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if (GGML_AMX_TILE)
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list(APPEND ARCH_FLAGS -mamx-tile)
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list(APPEND ARCH_DEFINITIONS GGML_AMX_TILE)
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endif()
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if (GGML_AMX_INT8)
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list(APPEND ARCH_FLAGS -mamx-int8)
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list(APPEND ARCH_DEFINITIONS GGML_AMX_INT8)
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endif()
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if (GGML_AMX_BF16)
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list(APPEND ARCH_FLAGS -mamx-bf16)
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list(APPEND ARCH_DEFINITIONS GGML_AMX_BF16)
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endif()
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endif()
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endif()
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elseif (${CMAKE_SYSTEM_PROCESSOR} MATCHES "ppc64")
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@ -302,18 +326,29 @@ else()
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endif()
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if (GGML_CPU_AARCH64)
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message(STATUS "Using runtime weight conversion of Q4_0 to Q4_0_x_x to enable optimized GEMM/GEMV kernels")
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target_compile_definitions(ggml-cpu PRIVATE GGML_USE_CPU_AARCH64)
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target_compile_definitions(${GGML_CPU_NAME} PRIVATE GGML_USE_CPU_AARCH64)
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||||
endif()
|
||||
|
||||
target_sources(ggml-cpu PRIVATE ${GGML_CPU_SOURCES})
|
||||
set_source_files_properties(${GGML_CPU_SOURCES} PROPERTIES COMPILE_OPTIONS "${ARCH_FLAGS}")
|
||||
set_source_files_properties(${GGML_CPU_SOURCES} PROPERTIES COMPILE_DEFINITIONS "${ARCH_DEFINITIONS}")
|
||||
message(STATUS "Adding CPU backend variant ${GGML_CPU_NAME}: ${ARCH_FLAGS} ${ARCH_DEFINITIONS}")
|
||||
target_sources(${GGML_CPU_NAME} PRIVATE ${GGML_CPU_SOURCES})
|
||||
target_compile_options(${GGML_CPU_NAME} PRIVATE ${ARCH_FLAGS})
|
||||
target_compile_definitions(${GGML_CPU_NAME} PRIVATE ${ARCH_DEFINITIONS})
|
||||
|
||||
# the feature detection code must be compiled without any architecture flags
|
||||
target_sources(ggml-cpu PRIVATE cpu-feats-x86.cpp)
|
||||
# target_sources(ggml-cpu PRIVATE cpu-feats-arm.cpp) # TODO: ARM feature detection
|
||||
if (GGML_BACKEND_DL)
|
||||
# The feature detection code is compiled as a separate target so that
|
||||
# it can be built without the architecture flags
|
||||
# Since multiple variants of the CPU backend may be included in the same
|
||||
# build, using set_source_files_properties() to set the arch flags is not possible
|
||||
set(GGML_CPU_FEATS_NAME ${GGML_CPU_NAME}-feats)
|
||||
add_library(${GGML_CPU_FEATS_NAME} OBJECT ggml-cpu/cpu-feats-x86.cpp)
|
||||
target_include_directories(${GGML_CPU_FEATS_NAME} PRIVATE . .. ../include)
|
||||
target_compile_definitions(${GGML_CPU_FEATS_NAME} PRIVATE ${ARCH_DEFINITIONS})
|
||||
target_compile_definitions(${GGML_CPU_FEATS_NAME} PRIVATE GGML_BACKEND_DL GGML_BACKEND_BUILD GGML_BACKEND_SHARED)
|
||||
set_target_properties(${GGML_CPU_FEATS_NAME} PROPERTIES POSITION_INDEPENDENT_CODE ON)
|
||||
target_link_libraries(${GGML_CPU_NAME} PRIVATE ${GGML_CPU_FEATS_NAME})
|
||||
endif()
|
||||
|
||||
if (EMSCRIPTEN)
|
||||
set_target_properties(ggml-cpu PROPERTIES COMPILE_FLAGS "-msimd128")
|
||||
set_target_properties(${GGML_CPU_NAME} PROPERTIES COMPILE_FLAGS "-msimd128")
|
||||
endif()
|
||||
endfunction()
|
||||
|
||||
@ -1,4 +1,3 @@
|
||||
#include "ggml-cpu.h"
|
||||
#include "ggml-backend-impl.h"
|
||||
|
||||
#if defined(__x86_64__) || (defined(_MSC_VER) && defined(_M_AMD64))
|
||||
@ -13,6 +12,7 @@
|
||||
#include <array>
|
||||
#include <string>
|
||||
|
||||
// ref: https://cdrdv2-public.intel.com/782156/325383-sdm-vol-2abcd.pdf
|
||||
struct cpuid_x86 {
|
||||
bool SSE3(void) { return f_1_ecx[0]; }
|
||||
bool PCLMULQDQ(void) { return f_1_ecx[1]; }
|
||||
@ -50,11 +50,15 @@ struct cpuid_x86 {
|
||||
bool INVPCID(void) { return f_7_ebx[10]; }
|
||||
bool RTM(void) { return is_intel && f_7_ebx[11]; }
|
||||
bool AVX512F(void) { return f_7_ebx[16]; }
|
||||
bool AVX512DQ(void) { return f_7_ebx[17]; }
|
||||
bool RDSEED(void) { return f_7_ebx[18]; }
|
||||
bool ADX(void) { return f_7_ebx[19]; }
|
||||
bool AVX512PF(void) { return f_7_ebx[26]; }
|
||||
bool AVX512ER(void) { return f_7_ebx[27]; }
|
||||
bool AVX512CD(void) { return f_7_ebx[28]; }
|
||||
bool AVX512BW(void) { return f_7_ebx[30]; }
|
||||
bool AVX512VL(void) { return f_7_ebx[31]; }
|
||||
|
||||
bool SHA(void) { return f_7_ebx[29]; }
|
||||
|
||||
bool PREFETCHWT1(void) { return f_7_ecx[0]; }
|
||||
@ -259,36 +263,57 @@ void test_x86_is() {
|
||||
static int ggml_backend_cpu_x86_score() {
|
||||
// FIXME: this does not check for OS support
|
||||
|
||||
cpuid_x86 is;
|
||||
// if the CPU backend was built with any features not supported by the current CPU, it cannot be used
|
||||
if (ggml_cpu_has_fma() && !is.FMA()) { return 0; }
|
||||
if (ggml_cpu_has_f16c() && !is.F16C()) { return 0; }
|
||||
if (ggml_cpu_has_ssse3() && !is.SSSE3()) { return 0; }
|
||||
if (ggml_cpu_has_sse3() && !is.SSE3()) { return 0; }
|
||||
if (ggml_cpu_has_avx() && !is.AVX()) { return 0; }
|
||||
if (ggml_cpu_has_avx_vnni() && !is.AVX_VNNI()) { return 0; }
|
||||
if (ggml_cpu_has_avx2() && !is.AVX2()) { return 0; }
|
||||
if (ggml_cpu_has_avx512() && !is.AVX512F()) { return 0; }
|
||||
if (ggml_cpu_has_avx512_vbmi() && !is.AVX512_VBMI()) { return 0; }
|
||||
if (ggml_cpu_has_avx512_bf16() && !is.AVX512_BF16()) { return 0; }
|
||||
if (ggml_cpu_has_avx512_vnni() && !is.AVX512_VNNI()) { return 0; }
|
||||
if (ggml_cpu_has_amx_int8() && !is.AMX_INT8()) { return 0; }
|
||||
|
||||
// calculate a backend score based on the supported features
|
||||
// more important features have a higher weight
|
||||
int score = 0;
|
||||
score += ggml_cpu_has_fma () * 1;
|
||||
score += ggml_cpu_has_f16c () * 1<<1;
|
||||
score += ggml_cpu_has_ssse3 () * 1<<2;
|
||||
score += ggml_cpu_has_sse3 () * 1<<3;
|
||||
score += ggml_cpu_has_avx_vnni () * 1<<4;
|
||||
score += ggml_cpu_has_avx () * 1<<5;
|
||||
score += ggml_cpu_has_avx2 () * 1<<6;
|
||||
score += ggml_cpu_has_avx512 () * 1<<7;
|
||||
// score += ggml_cpu_has_avx512_vbmi() * 1<<8; // not used
|
||||
score += ggml_cpu_has_avx512_bf16() * 1<<9;
|
||||
score += ggml_cpu_has_avx512_vnni() * 1<<10;
|
||||
score += ggml_cpu_has_amx_int8 () * 1<<11;
|
||||
cpuid_x86 is;
|
||||
|
||||
#ifdef GGML_FMA
|
||||
if (!is.FMA()) { return 0; }
|
||||
score += 1;
|
||||
#endif
|
||||
#ifdef GGML_F16C
|
||||
if (!is.F16C()) { return 0; }
|
||||
score += 1<<1;
|
||||
#endif
|
||||
#ifdef GGML_SSE42
|
||||
if (!is.SSE42()) { return 0; }
|
||||
score += 1<<2;
|
||||
#endif
|
||||
#ifdef GGML_AVX
|
||||
if (!is.AVX()) { return 0; }
|
||||
score += 1<<4;
|
||||
#endif
|
||||
#ifdef GGML_AVX2
|
||||
if (!is.AVX2()) { return 0; }
|
||||
score += 1<<5;
|
||||
#endif
|
||||
#ifdef GGML_AVX_VNNI
|
||||
if (!is.AVX_VNNI()) { return 0; }
|
||||
score += 1<<6;
|
||||
#endif
|
||||
#ifdef GGML_AVX512
|
||||
if (!is.AVX512F()) { return 0; }
|
||||
if (!is.AVX512CD()) { return 0; }
|
||||
if (!is.AVX512VL()) { return 0; }
|
||||
if (!is.AVX512DQ()) { return 0; }
|
||||
if (!is.AVX512BW()) { return 0; }
|
||||
score += 1<<7;
|
||||
#endif
|
||||
#ifdef GGML_AVX512_VBMI
|
||||
if (!is.AVX512_VBMI()) { return 0; }
|
||||
score += 1<<8;
|
||||
#endif
|
||||
#ifdef GGML_AVX512_BF16
|
||||
if (!is.AVX512_BF16()) { return 0; }
|
||||
score += 1<<9;
|
||||
#endif
|
||||
#ifdef GGML_AVX512_VNNI
|
||||
if (!is.AVX512_VNNI()) { return 0; }
|
||||
score += 1<<10;
|
||||
#endif
|
||||
#ifdef GGML_AMX_INT8
|
||||
if (!is.AMX_INT8()) { return 0; }
|
||||
score += 1<<11;
|
||||
#endif
|
||||
|
||||
return score;
|
||||
}
|
||||
|
||||
@ -756,7 +756,7 @@ do { \
|
||||
#define GGML_F32Cx8_LOAD(x) _mm256_cvtph_ps(_mm_loadu_si128((const __m128i *)(x)))
|
||||
#define GGML_F32Cx8_STORE(x, y) _mm_storeu_si128((__m128i *)(x), _mm256_cvtps_ph(y, 0))
|
||||
#else
|
||||
static inline __m256 __avx_f32cx8_load(ggml_fp16_t *x) {
|
||||
static inline __m256 __avx_f32cx8_load(const ggml_fp16_t * x) {
|
||||
float tmp[8];
|
||||
|
||||
for (int i = 0; i < 8; i++) {
|
||||
|
||||
@ -641,7 +641,15 @@ static ggml_backend_feature * ggml_backend_cpu_get_features(ggml_backend_reg_t r
|
||||
if (ggml_cpu_has_llamafile()) {
|
||||
features.push_back({ "LLAMAFILE", "1" });
|
||||
}
|
||||
// TODO: rename this
|
||||
#ifdef GGML_USE_ACCELERATE
|
||||
features.push_back({ "ACCELERATE", "1" });
|
||||
#endif
|
||||
#ifdef GGML_USE_CPU_HBM
|
||||
features.push_back({ "CPU_HBM", "1" });
|
||||
#endif
|
||||
#ifdef GGML_USE_OPENMP
|
||||
features.push_back({ "OPENMP", "1" });
|
||||
#endif
|
||||
#ifdef GGML_USE_CPU_AARCH64
|
||||
features.push_back({ "AARCH64_REPACK", "1" });
|
||||
#endif
|
||||
|
||||
Loading…
Reference in New Issue
Block a user