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ggml-cpu: replace AArch64 NEON assembly with intrinsics in ggml_gemv_q4_0_4x4_q8_0() (llama/10567)

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Signed-off-by: Adrien Gallouët <angt@huggingface.co>
This commit is contained in:
Adrien Gallouët 2024-11-30 18:13:18 +01:00 committed by Georgi Gerganov
parent 30e35d7271
commit 4b7e059e15
1 changed files with 37 additions and 57 deletions
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ggml/src/ggml-cpu/ggml-cpu-aarch64.c
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@ -525,67 +525,47 @@ void ggml_gemv_q4_0_4x4_q8_0(int n, float * restrict s, size_t bs, const void *
UNUSED(ncols_interleaved); UNUSED(ncols_interleaved);
UNUSED(blocklen); UNUSED(blocklen);
#if ! ((defined(_MSC_VER)) && ! defined(__clang__)) && defined(__aarch64__) && defined(__ARM_NEON) #if ! ((defined(_MSC_VER)) && ! defined(__clang__)) && defined(__aarch64__) && defined(__ARM_NEON) && defined(__ARM_FEATURE_DOTPROD)
if (ggml_cpu_has_neon() && ggml_cpu_has_dotprod()) { if (ggml_cpu_has_neon() && ggml_cpu_has_dotprod()) {
const void * b_ptr = vx; const block_q4_0x4 * b_ptr = (const block_q4_0x4 *)vx;
const void * a_ptr = vy;
float * res_ptr = s;
__asm__ __volatile__( for (int c = 0; c < nc; c += ncols_interleaved) {
"movi v31.16b, #0x4\n" const block_q8_0 * a_ptr = (const block_q8_0 *)vy;
"movi v30.16b, #0xf0\n" float32x4_t acc = vdupq_n_f32(0);
"add %x[b_ptr], %x[b_ptr], #0x8\n" for (int b = 0; b < nb; b++) {
"1:" // Column loop int8x16_t b0 = vld1q_s8((const int8_t *)b_ptr->qs);
"add x22, %x[a_ptr], #0x2\n" int8x16_t b1 = vld1q_s8((const int8_t *)b_ptr->qs + 16);
"movi v29.16b, #0x0\n" int8x16_t b2 = vld1q_s8((const int8_t *)b_ptr->qs + 32);
"mov x21, %x[nb]\n" int8x16_t b3 = vld1q_s8((const int8_t *)b_ptr->qs + 48);
"2:" // Block loop float16x4_t bd = vld1_f16((const __fp16 *)b_ptr->d);
"ldr q28, [%x[b_ptr], #0x0]\n"
"ldr q27, [x22, #0x0]\n" int8x16_t a0 = vld1q_s8(a_ptr->qs);
"movi v26.4s, #0x0\n" int8x16_t a1 = vld1q_s8(a_ptr->qs + qk/2);
"sub x20, x22, #0x2\n" float16x4_t ad = vld1_dup_f16((const __fp16 *)&a_ptr->d);
"ldr q25, [x22, #0x10]\n"
"ldr q24, [%x[b_ptr], #0x10]\n" int32x4_t ret = vdupq_n_s32(0);
"sub x21, x21, #0x1\n"
"add x22, x22, #0x22\n" ret = vdotq_laneq_s32(ret, b0 << 4, a0, 0);
"ldr q23, [%x[b_ptr], #0x20]\n" ret = vdotq_laneq_s32(ret, b1 << 4, a0, 1);
"ldr q22, [%x[b_ptr], #0x30]\n" ret = vdotq_laneq_s32(ret, b2 << 4, a0, 2);
"ld1r { v21.8h }, [x20]\n" ret = vdotq_laneq_s32(ret, b3 << 4, a0, 3);
"ldr q20, [%x[b_ptr], #-0x8]\n"
"sshl v16.16b, v28.16b, v31.16b\n" ret = vdotq_laneq_s32(ret, b0 & 0xf0U, a1, 0);
"and v28.16b, v28.16b, v30.16b\n" ret = vdotq_laneq_s32(ret, b1 & 0xf0U, a1, 1);
"sshl v19.16b, v24.16b, v31.16b\n" ret = vdotq_laneq_s32(ret, b2 & 0xf0U, a1, 2);
"and v24.16b, v24.16b, v30.16b\n" ret = vdotq_laneq_s32(ret, b3 & 0xf0U, a1, 3);
"add %x[b_ptr], %x[b_ptr], #0x48\n"
"sshl v18.16b, v23.16b, v31.16b\n" acc = vfmaq_f32(acc, vcvtq_n_f32_s32(ret, 4),
"and v23.16b, v23.16b, v30.16b\n" vmulq_f32(vcvt_f32_f16(ad), vcvt_f32_f16(bd)));
".inst 0x4f9be21a // sdot v26.4s, v16.16b, v27.4b[0]\n" a_ptr++;
"sshl v17.16b, v22.16b, v31.16b\n" b_ptr++;
"and v22.16b, v22.16b, v30.16b\n" }
"fcvtl v21.4s, v21.4h\n" vst1q_f32(s, acc);
"fcvtl v16.4s, v20.4h\n" s += ncols_interleaved;
".inst 0x4f99e39a // sdot v26.4s, v28.16b, v25.4b[0]\n" }
"fmul v16.4s, v16.4s, v21.4s\n"
".inst 0x4fbbe27a // sdot v26.4s, v19.16b, v27.4b[1]\n"
".inst 0x4fb9e31a // sdot v26.4s, v24.16b, v25.4b[1]\n"
".inst 0x4f9bea5a // sdot v26.4s, v18.16b, v27.4b[2]\n"
".inst 0x4f99eafa // sdot v26.4s, v23.16b, v25.4b[2]\n"
".inst 0x4fbbea3a // sdot v26.4s, v17.16b, v27.4b[3]\n"
".inst 0x4fb9eada // sdot v26.4s, v22.16b, v25.4b[3]\n"
"scvtf v26.4s, v26.4s, #0x4\n"
"fmla v29.4s, v26.4s, v16.4s\n"
"cbnz x21, 2b\n"
"sub %x[nc], %x[nc], #0x4\n"
"str q29, [%x[res_ptr], #0x0]\n"
"add %x[res_ptr], %x[res_ptr], #0x10\n"
"cbnz %x[nc], 1b\n"
: [b_ptr] "+&r" (b_ptr), [res_ptr] "+&r" (res_ptr), [nc] "+&r" (nc)
: [a_ptr] "r" (a_ptr), [nb] "r" (nb)
: "memory", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "x20", "x21", "x22"
);
return; return;
} }
#endif // #if ! ((defined(_MSC_VER)) && ! defined(__clang__)) && defined(__aarch64__) && defined(__ARM_NEON) #endif // #if ! ((defined(_MSC_VER)) && ! defined(__clang__)) && defined(__aarch64__) && defined(__ARM_NEON) && defined(__ARM_FEATURE_DOTPROD)
float sumf[4]; float sumf[4];
int sumi; int sumi;