mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-30 10:39:04 +00:00
cd7ce5226d
Signed-off-by: Gabor Juhos <juhosg@openwrt.org> SVN-Revision: 36269
43 lines
1.2 KiB
Diff
43 lines
1.2 KiB
Diff
From fe26f3e7d1329fc2a5ac14808dbecb7d324d0a41 Mon Sep 17 00:00:00 2001
|
|
From: Gabor Juhos <juhosg@openwrt.org>
|
|
Date: Wed, 27 Mar 2013 20:56:22 +0100
|
|
Subject: [PATCH 3/5] MIPS: ralink: process PCI pinmux group
|
|
|
|
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
|
---
|
|
arch/mips/ralink/pinmux.c | 14 +++++++++++++-
|
|
1 file changed, 13 insertions(+), 1 deletion(-)
|
|
|
|
--- a/arch/mips/ralink/pinmux.c
|
|
+++ b/arch/mips/ralink/pinmux.c
|
|
@@ -29,7 +29,7 @@ void ralink_pinmux(void)
|
|
const __be32 *wdt;
|
|
struct device_node *np;
|
|
struct property *prop;
|
|
- const char *uart, *pin;
|
|
+ const char *uart, *pci, *pin;
|
|
u32 mode = 0;
|
|
|
|
np = of_find_compatible_node(NULL, NULL, "ralink,rt3050-sysc");
|
|
@@ -76,5 +76,20 @@ void ralink_pinmux(void)
|
|
if (wdt && *wdt && rt_pinmux.wdt_reset)
|
|
rt_pinmux.wdt_reset();
|
|
|
|
+ pci = NULL;
|
|
+ if (rt_pinmux.pci)
|
|
+ of_property_read_string(np, "ralink,pcimux", &pci);
|
|
+
|
|
+ if (pci) {
|
|
+ int m = ralink_mux_mask(pci, rt_pinmux.pci);
|
|
+ mode &= ~(rt_pinmux.pci_mask << rt_pinmux.pci_shift);
|
|
+ if (m) {
|
|
+ mode |= (m << rt_pinmux.pci_shift);
|
|
+ pr_debug("pinmux: registered pcimux \"%s\"\n", pci);
|
|
+ } else {
|
|
+ pr_debug("pinmux: registered pcimux \"gpio\"\n");
|
|
+ }
|
|
+ }
|
|
+
|
|
rt_sysc_w32(mode, SYSC_REG_GPIO_MODE);
|
|
}
|