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fa70b3a4bb
This adds 3 Mikrotik rb4xx series drivers as follows: rb4xx-cpld: This is in the mfd subsystem, and is the parent CPLD device that interfaces between the SoC SPI bus and its two children below. rb4xx-gpio: This is the GPIO expander. rb4xx-nand: This is the NAND driver. The history of this code comes in three phases. 1. The first is a May 2015 attempt to push the equivalient ar71xx rb4xx drivers upstream. See https://lore.kernel.org/patchwork/patch/940880/. Module-author: Gabor Juhos <juhosg@openwrt.org> Module-author: Imre Kaloz <kaloz@openwrt.org> Module-author: Bert Vermeulen <bert@biot.com> 2. Next several ar71xx patches were applied bringing the code current. commit7bbf4117c6
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> commitaf79fdbe4a
commit889272d92d
commite21cb649a2
commit7c09fa4a74
Signed-off-by: Felix Fietkau <nbd@nbd.name> 3. Finally a heavy refactor to split the driver into the three new subsystems, and updated to work with the device tree configuration, plus updates and review feedback incorporated Reviewed-by: Thibaut VARÈNE <hacks@slashdirt.org> Signed-off-by: Christopher Hill <ch6574@gmail.com>
183 lines
4.6 KiB
C
183 lines
4.6 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* CPLD driver for the MikroTik RouterBoard 4xx series
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*
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* This driver provides access to a CPLD that interfaces between the SoC SPI bus
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* and other devices. Behind the CPLD there is a NAND flash chip and five LEDs.
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*
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* The CPLD supports SPI two-wire mode, in which two bits are transferred per
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* SPI clock cycle. The second bit is transmitted with the SoC's CS2 pin.
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*
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* The CPLD also acts as a GPIO expander.
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*
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* Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
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* Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
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* Copyright (C) 2015 Bert Vermeulen <bert@biot.com>
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* Copyright (C) 2020 Christopher Hill <ch6574@gmail.com>
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*
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* This file was based on the driver for Linux 2.6.22 published by
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* MikroTik for their RouterBoard 4xx series devices.
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*/
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#include <linux/mfd/core.h>
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#include <linux/spi/spi.h>
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#include <linux/module.h>
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#include <linux/of_platform.h>
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#include <mfd/rb4xx-cpld.h>
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/* CPLD commands */
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#define CPLD_CMD_WRITE_NAND 0x08 /* send cmd, n x send data, send idle */
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#define CPLD_CMD_WRITE_CFG 0x09 /* send cmd, n x send cfg */
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#define CPLD_CMD_READ_NAND 0x0a /* send cmd, send idle, n x read data */
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#define CPLD_CMD_READ_FAST 0x0b /* send cmd, 4 x idle, n x read data */
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#define CPLD_CMD_GPIO8_HIGH 0x0c /* send cmd */
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#define CPLD_CMD_GPIO8_LOW 0x0d /* send cmd */
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static int rb4xx_cpld_write_nand(struct rb4xx_cpld *cpld, const void *tx_buf,
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unsigned int len)
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{
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struct spi_message m;
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static const u8 cmd = CPLD_CMD_WRITE_NAND;
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struct spi_transfer t[3] = {
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{
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.tx_buf = &cmd,
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.len = sizeof(cmd),
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}, {
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.tx_buf = tx_buf,
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.len = len,
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.tx_nbits = SPI_NBITS_DUAL,
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}, {
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.len = 1,
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.tx_nbits = SPI_NBITS_DUAL,
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},
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};
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spi_message_init(&m);
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spi_message_add_tail(&t[0], &m);
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spi_message_add_tail(&t[1], &m);
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spi_message_add_tail(&t[2], &m);
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return spi_sync(cpld->spi, &m);
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}
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static int rb4xx_cpld_read_nand(struct rb4xx_cpld *cpld, void *rx_buf,
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unsigned int len)
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{
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struct spi_message m;
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static const u8 cmd[2] = {
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CPLD_CMD_READ_NAND, 0
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};
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struct spi_transfer t[2] = {
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{
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.tx_buf = &cmd,
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.len = sizeof(cmd),
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}, {
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.rx_buf = rx_buf,
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.len = len,
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},
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};
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spi_message_init(&m);
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spi_message_add_tail(&t[0], &m);
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spi_message_add_tail(&t[1], &m);
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return spi_sync(cpld->spi, &m);
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}
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static int rb4xx_cpld_cmd(struct rb4xx_cpld *cpld, const void *tx_buf,
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unsigned int len)
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{
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struct spi_message m;
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struct spi_transfer t = {
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.tx_buf = tx_buf,
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.len = len,
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};
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spi_message_init(&m);
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spi_message_add_tail(&t, &m);
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return spi_sync(cpld->spi, &m);
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}
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static int rb4xx_cpld_gpio_set_0_7(struct rb4xx_cpld *cpld, u8 values)
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{
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/* GPIO 0-7 change can be sent via command + bitfield */
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u8 cmd[2] = {
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CPLD_CMD_WRITE_CFG, values
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};
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return rb4xx_cpld_cmd(cpld, &cmd, 2);
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}
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static int rb4xx_cpld_gpio_set_8(struct rb4xx_cpld *cpld, u8 value)
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{
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/* GPIO 8 uses dedicated high/low commands */
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u8 cmd = CPLD_CMD_GPIO8_HIGH | !!(value);
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return rb4xx_cpld_cmd(cpld, &cmd, 1);
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}
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static const struct mfd_cell rb4xx_cpld_cells[] = {
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{
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.name = "mikrotik,rb4xx-gpio",
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.of_compatible = "mikrotik,rb4xx-gpio",
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}, {
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.name = "mikrotik,rb4xx-nand",
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.of_compatible = "mikrotik,rb4xx-nand",
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},
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};
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static int rb4xx_cpld_probe(struct spi_device *spi)
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{
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struct device *dev = &spi->dev;
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struct rb4xx_cpld *cpld;
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int ret;
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cpld = devm_kzalloc(dev, sizeof(*cpld), GFP_KERNEL);
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if (!cpld)
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return -ENOMEM;
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dev_set_drvdata(dev, cpld);
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cpld->spi = spi;
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cpld->write_nand = rb4xx_cpld_write_nand;
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cpld->read_nand = rb4xx_cpld_read_nand;
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cpld->gpio_set_0_7 = rb4xx_cpld_gpio_set_0_7;
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cpld->gpio_set_8 = rb4xx_cpld_gpio_set_8;
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spi->mode = SPI_MODE_0 | SPI_TX_DUAL;
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ret = spi_setup(spi);
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if (ret)
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return ret;
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return devm_mfd_add_devices(dev, PLATFORM_DEVID_NONE,
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rb4xx_cpld_cells,
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ARRAY_SIZE(rb4xx_cpld_cells),
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NULL, 0, NULL);
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}
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static int rb4xx_cpld_remove(struct spi_device *spi)
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{
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return 0;
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}
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static const struct of_device_id rb4xx_cpld_dt_match[] = {
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{ .compatible = "mikrotik,rb4xx-cpld", },
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{ },
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};
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MODULE_DEVICE_TABLE(of, rb4xx_cpld_dt_match);
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static struct spi_driver rb4xx_cpld_driver = {
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.probe = rb4xx_cpld_probe,
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.remove = rb4xx_cpld_remove,
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.driver = {
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.name = "rb4xx-cpld",
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.bus = &spi_bus_type,
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.of_match_table = of_match_ptr(rb4xx_cpld_dt_match),
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},
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};
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module_spi_driver(rb4xx_cpld_driver);
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MODULE_DESCRIPTION("Mikrotik RB4xx CPLD driver");
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MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
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MODULE_AUTHOR("Imre Kaloz <kaloz@openwrt.org>");
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MODULE_AUTHOR("Bert Vermeulen <bert@biot.com>");
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MODULE_AUTHOR("Christopher Hill <ch6574@gmail.com");
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MODULE_LICENSE("GPL v2");
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