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793f8ab62c
Add kernel patches for version 6.1. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
89 lines
3.1 KiB
Diff
89 lines
3.1 KiB
Diff
From d3c267836e424c9246a4b174d9bd024cb0f656b4 Mon Sep 17 00:00:00 2001
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From: Dom Cobley <popcornmix@gmail.com>
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Date: Tue, 17 May 2022 12:46:42 +0100
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Subject: [PATCH] drm/vc4: hdmi: Add more checks for 4k resolutions
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At least the 4096x2160@60Hz mode requires some overclocking that isn't
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available by default, even if hdmi_enable_4kp60 is enabled.
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Let's add some logic to detect whether we can satisfy the core clock
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requirements for that mode, and prevent it from being used otherwise.
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Signed-off-by: Dom Cobley <popcornmix@gmail.com>
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Reviewed-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
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Signed-off-by: Maxime Ripard <maxime@cerno.tech>
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---
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drivers/gpu/drm/vc4/vc4_drv.h | 6 ++++++
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drivers/gpu/drm/vc4/vc4_hdmi.c | 11 +++++++++--
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drivers/gpu/drm/vc4/vc4_hvs.c | 3 +++
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3 files changed, 18 insertions(+), 2 deletions(-)
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--- a/drivers/gpu/drm/vc4/vc4_drv.h
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+++ b/drivers/gpu/drm/vc4/vc4_drv.h
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@@ -352,6 +352,12 @@ struct vc4_hvs {
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* available.
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*/
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bool vc5_hdmi_enable_hdmi_20;
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+
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+ /*
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+ * 4096x2160@60 requires a core overclock to work, so register
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+ * whether that is sufficient.
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+ */
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+ bool vc5_hdmi_enable_4096by2160;
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};
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struct vc4_plane {
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--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
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+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
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@@ -1976,6 +1976,7 @@ vc4_hdmi_sink_supports_format_bpc(const
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static enum drm_mode_status
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vc4_hdmi_encoder_clock_valid(const struct vc4_hdmi *vc4_hdmi,
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+ const struct drm_display_mode *mode,
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unsigned long long clock)
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{
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const struct drm_connector *connector = &vc4_hdmi->connector;
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@@ -1988,6 +1989,12 @@ vc4_hdmi_encoder_clock_valid(const struc
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if (!vc4->hvs->vc5_hdmi_enable_hdmi_20 && clock > HDMI_14_MAX_TMDS_CLK)
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return MODE_CLOCK_HIGH;
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+ /* 4096x2160@60 is not reliable without overclocking core */
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+ if (!vc4->hvs->vc5_hdmi_enable_4096by2160 &&
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+ mode->hdisplay > 3840 && mode->vdisplay >= 2160 &&
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+ drm_mode_vrefresh(mode) >= 50)
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+ return MODE_CLOCK_HIGH;
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+
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if (info->max_tmds_clock && clock > (info->max_tmds_clock * 1000))
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return MODE_CLOCK_HIGH;
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@@ -2022,7 +2029,7 @@ vc4_hdmi_encoder_compute_clock(const str
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unsigned long long clock;
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clock = vc4_hdmi_encoder_compute_mode_clock(mode, bpc, fmt);
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- if (vc4_hdmi_encoder_clock_valid(vc4_hdmi, clock) != MODE_OK)
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+ if (vc4_hdmi_encoder_clock_valid(vc4_hdmi, mode, clock) != MODE_OK)
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return -EINVAL;
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vc4_state->tmds_char_rate = clock;
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@@ -2185,7 +2192,7 @@ vc4_hdmi_encoder_mode_valid(struct drm_e
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(mode->hsync_end % 2) || (mode->htotal % 2)))
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return MODE_H_ILLEGAL;
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- return vc4_hdmi_encoder_clock_valid(vc4_hdmi, mode->clock * 1000);
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+ return vc4_hdmi_encoder_clock_valid(vc4_hdmi, mode, mode->clock * 1000);
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}
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static const struct drm_encoder_helper_funcs vc4_hdmi_encoder_helper_funcs = {
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--- a/drivers/gpu/drm/vc4/vc4_hvs.c
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+++ b/drivers/gpu/drm/vc4/vc4_hvs.c
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@@ -1060,6 +1060,9 @@ static int vc4_hvs_bind(struct device *d
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if (max_rate >= 550000000)
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hvs->vc5_hdmi_enable_hdmi_20 = true;
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+ if (max_rate >= 600000000)
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+ hvs->vc5_hdmi_enable_4096by2160 = true;
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+
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hvs->max_core_rate = max_rate;
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ret = clk_prepare_enable(hvs->core_clk);
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