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23deb4ac90
Introduce support for the Qualcomm IPQ60xx SoC. WiFi support still has to be handled and correctly fix hence this is currently marked as source-only to have a solid base to progress on correct support of this and hope Upstream QUIC publish newers ath11k drivers for this SoC. Co-developed-by: Robert Marko <robimarko@gmail.com> Signed-off-by: Robert Marko <robimarko@gmail.com> Signed-off-by: Mantas Pucka <mantas@8devices.com> [ improve commit description, add SoB for Robert, make it source-only ] Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
40 lines
1.2 KiB
Diff
40 lines
1.2 KiB
Diff
From 91e7c87f0ec1d644afb65cf3a16ded874c9d4ab9 Mon Sep 17 00:00:00 2001
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From: Robert Marko <robimarko@gmail.com>
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Date: Fri, 26 May 2023 21:08:54 +0200
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Subject: [PATCH] clk: qcom: gcc-ipq6018: update UBI32 PLL
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Update the UBI32 alpha PLL config to the latest values from the downstream
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QCA 5.4 kernel.
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Signed-off-by: Robert Marko <robimarko@gmail.com>
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Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Link: https://lore.kernel.org/r/20230526190855.2941291-1-robimarko@gmail.com
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---
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drivers/clk/qcom/gcc-ipq6018.c | 7 ++++++-
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1 file changed, 6 insertions(+), 1 deletion(-)
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--- a/drivers/clk/qcom/gcc-ipq6018.c
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+++ b/drivers/clk/qcom/gcc-ipq6018.c
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@@ -4143,15 +4143,20 @@ static struct clk_branch gcc_dcc_clk = {
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static const struct alpha_pll_config ubi32_pll_config = {
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.l = 0x3e,
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- .alpha = 0x57,
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+ .alpha = 0x6667,
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.config_ctl_val = 0x240d6aa8,
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.config_ctl_hi_val = 0x3c2,
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+ .config_ctl_val = 0x240d4828,
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+ .config_ctl_hi_val = 0x6,
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.main_output_mask = BIT(0),
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.aux_output_mask = BIT(1),
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.pre_div_val = 0x0,
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.pre_div_mask = BIT(12),
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.post_div_val = 0x0,
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.post_div_mask = GENMASK(9, 8),
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+ .alpha_en_mask = BIT(24),
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+ .test_ctl_val = 0x1C0000C0,
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+ .test_ctl_hi_val = 0x4000,
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};
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static const struct alpha_pll_config nss_crypto_pll_config = {
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