openwrt/target/linux/ramips/dts/mt7621_tplink_archer-c6u-v1.dts
Arınç ÜNAL 3ea6125c50 ramips: mt7621-dts: describe switch PHYs and adjust PHY muxing
Currently, the MT7530 DSA subdriver configures the MT7530 switch to provide
direct access to switch PHYs, meaning, the switch PHYs listen on the MDIO
bus the switch listens on. The PHY muxing feature makes use of this.

This is problematic as the PHY may be attached before the switch is
initialised, in which case, the PHY will fail to be attached.

Since commit 91374ba537bd ("net: dsa: mt7530: support OF-based registration
of switch MDIO bus") on mainline Linux, we can describe the switch PHYs on
the MDIO bus of the switch on the device tree.

When the PHY is described this way, the switch will be initialised first,
then the switch MDIO bus will be registered. Only after these steps, the
PHY will be attached.

Describe the switch PHYs on mt7621.dtsi and remove defining the switch PHY
on the SoC's mdio bus node. When the PHY muxing is in use, the interrupts
for the muxed PHY won't work, therefore delete the "interrupts" property on
the devices where the PHY muxing feature is in use.

Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
2024-05-01 13:50:54 +01:00

247 lines
4.3 KiB
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "mt7621.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
/ {
compatible = "tplink,archer-c6u-v1", "mediatek,mt7621-soc";
model = "TP-Link Archer C6U v1";
aliases {
led-boot = &led_power;
led-failsafe = &led_power;
led-running = &led_power;
led-upgrade = &led_power;
label-mac-device = &gmac0;
};
chosen {
bootargs = "console=ttyS0,115200";
};
keys {
compatible = "gpio-keys";
reset {
label = "reset";
gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
wps {
label = "wps";
gpios = <&gpio 10 GPIO_ACTIVE_LOW>;
linux,code = <KEY_WPS_BUTTON>;
};
};
leds {
compatible = "gpio-leds";
led_power: power {
function = LED_FUNCTION_POWER;
color = <LED_COLOR_ID_GREEN>;
gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
};
usb {
function = LED_FUNCTION_USB;
color = <LED_COLOR_ID_GREEN>;
gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
trigger-sources = <&ehci_port2>;
linux,default-trigger = "usbport";
};
wan-orange {
function = LED_FUNCTION_WAN;
color = <LED_COLOR_ID_ORANGE>;
gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
};
lan {
function = LED_FUNCTION_LAN;
color = <LED_COLOR_ID_GREEN>;
gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
};
wifi5g {
label = "green:wifi5g";
gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy1tpt";
};
wifi2g {
label = "green:wifi2g";
gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy0tpt";
};
wan-green {
function = LED_FUNCTION_WAN;
color = <LED_COLOR_ID_GREEN>;
gpios = <&gpio 45 GPIO_ACTIVE_LOW>;
};
};
reg_usb_vbus: regulator {
compatible = "regulator-fixed";
regulator-name = "usb_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio 3 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
};
&spi0 {
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <80000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x000000 0x040000>;
read-only;
};
partition@40000 {
compatible = "denx,uimage";
label = "firmware";
reg = <0x040000 0xf60000>;
};
partition@fa0000 {
label = "config";
reg = <0xfa0000 0x010000>;
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
macaddr_config_8: macaddr@8 {
compatible = "mac-base";
reg = <0x8 0x6>;
#nvmem-cell-cells = <1>;
};
};
};
partition@fb0000 {
label = "tplink";
reg = <0xfb0000 0x040000>;
read-only;
};
partition@ff0000 {
label = "radio";
reg = <0xff0000 0x010000>;
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
eeprom_radio_0: eeprom@0 {
reg = <0x0 0x400>;
};
eeprom_radio_8000: eeprom@8000 {
reg = <0x8000 0x4da8>;
};
};
};
};
};
};
&pcie {
status = "okay";
};
&pcie0 {
mt76@0,0 {
compatible = "mediatek,mt76";
reg = <0x0000 0 0 0 0>;
nvmem-cells = <&eeprom_radio_0>, <&macaddr_config_8 0>;
nvmem-cell-names = "eeprom", "mac-address";
ieee80211-freq-limit = <2400000 2500000>;
};
};
&pcie1 {
mt76@0,0 {
compatible = "mediatek,mt76";
reg = <0x0000 0 0 0 0>;
nvmem-cells = <&eeprom_radio_8000>, <&macaddr_config_8 (-1)>;
nvmem-cell-names = "eeprom", "mac-address";
ieee80211-freq-limit = <5000000 6000000>;
};
};
&gmac0 {
nvmem-cells = <&macaddr_config_8 0>;
nvmem-cell-names = "mac-address";
};
&gmac1 {
status = "okay";
label = "wan";
phy-handle = <&ethphy0>;
nvmem-cells = <&macaddr_config_8 1>;
nvmem-cell-names = "mac-address";
};
&ethphy0 {
/delete-property/ interrupts;
};
&switch0 {
ports {
port@1 {
status = "okay";
label = "lan1";
};
port@2 {
status = "okay";
label = "lan2";
};
port@3 {
status = "okay";
label = "lan3";
};
port@4 {
status = "okay";
label = "lan4";
};
};
};
&state_default {
gpio {
groups = "i2c", "uart2", "uart3", "jtag", "wdt", "sdhci";
function = "gpio";
};
};
&xhci {
vbus-supply = <&reg_usb_vbus>;
};