mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-20 14:13:16 +00:00
96 lines
2.9 KiB
Diff
96 lines
2.9 KiB
Diff
--- a/arch/arm/mach-cns3xxx/pcie.c
|
|
+++ b/arch/arm/mach-cns3xxx/pcie.c
|
|
@@ -18,6 +18,7 @@
|
|
#include <linux/io.h>
|
|
#include <linux/ioport.h>
|
|
#include <linux/interrupt.h>
|
|
+#include <linux/irq.h>
|
|
#include <linux/ptrace.h>
|
|
#include <asm/mach/map.h>
|
|
#include "cns3xxx.h"
|
|
@@ -27,7 +28,7 @@ struct cns3xxx_pcie {
|
|
void __iomem *host_regs; /* PCI config registers for host bridge */
|
|
void __iomem *cfg0_regs; /* PCI Type 0 config registers */
|
|
void __iomem *cfg1_regs; /* PCI Type 1 config registers */
|
|
- unsigned int irqs[2];
|
|
+ unsigned int irqs[5];
|
|
struct resource res_io;
|
|
struct resource res_mem;
|
|
int port;
|
|
@@ -95,7 +96,7 @@ static inline int check_master_abort(str
|
|
void __iomem *host_base;
|
|
u32 sreg, ereg;
|
|
|
|
- host_base = (void __iomem *) cnspci->cfg_bases[CNS3XXX_HOST_TYPE].virtual;
|
|
+ host_base = (void __iomem *) cnspci->host_regs;
|
|
sreg = __raw_readw(host_base + 0x6) & 0xF900;
|
|
ereg = __raw_readl(host_base + 0x104); // Uncorrectable Error Status Reg
|
|
|
|
@@ -209,7 +210,7 @@ static struct pci_ops cns3xxx_pcie_ops =
|
|
static int cns3xxx_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
|
|
{
|
|
struct cns3xxx_pcie *cnspci = pdev_to_cnspci(dev);
|
|
- int irq = cnspci->irqs[!!dev->bus->number];
|
|
+ int irq = cnspci->irqs[!!dev->bus->number + pin - 1];
|
|
|
|
pr_info("PCIe map irq: %04d:%02x:%02x.%02x slot %d, pin %d, irq: %d\n",
|
|
pci_domain_nr(dev->bus), dev->bus->number, PCI_SLOT(dev->devfn),
|
|
@@ -235,7 +236,13 @@ static struct cns3xxx_pcie cns3xxx_pcie[
|
|
.end = CNS3XXX_PCIE0_HOST_BASE - 1, /* 176 MiB */
|
|
.flags = IORESOURCE_MEM,
|
|
},
|
|
- .irqs = { IRQ_CNS3XXX_PCIE0_RC, IRQ_CNS3XXX_PCIE0_DEVICE, },
|
|
+ .irqs = {
|
|
+ IRQ_CNS3XXX_PCIE0_RC,
|
|
+ IRQ_CNS3XXX_PCIE0_DEVICE,
|
|
+ IRQ_CNS3XXX_PCIE0_DEVICE,
|
|
+ IRQ_CNS3XXX_PCIE0_DEVICE,
|
|
+ IRQ_CNS3XXX_PCIE0_DEVICE,
|
|
+ },
|
|
.port = 0,
|
|
},
|
|
[1] = {
|
|
@@ -254,7 +261,13 @@ static struct cns3xxx_pcie cns3xxx_pcie[
|
|
.end = CNS3XXX_PCIE1_HOST_BASE - 1, /* 176 MiB */
|
|
.flags = IORESOURCE_MEM,
|
|
},
|
|
- .irqs = { IRQ_CNS3XXX_PCIE1_RC, IRQ_CNS3XXX_PCIE1_DEVICE, },
|
|
+ .irqs = {
|
|
+ IRQ_CNS3XXX_PCIE1_RC,
|
|
+ IRQ_CNS3XXX_PCIE1_DEVICE,
|
|
+ IRQ_CNS3XXX_PCIE1_DEVICE,
|
|
+ IRQ_CNS3XXX_PCIE1_DEVICE,
|
|
+ IRQ_CNS3XXX_PCIE1_DEVICE,
|
|
+ },
|
|
.port = 1,
|
|
},
|
|
};
|
|
@@ -346,6 +359,14 @@ static int cns3xxx_pcie_abort_handler(un
|
|
return 0;
|
|
}
|
|
|
|
+void __init cns3xxx_pcie_set_irqs(int bus, int *irqs)
|
|
+{
|
|
+ int i;
|
|
+
|
|
+ for (i = 0; i < 4; i++)
|
|
+ cns3xxx_pcie[bus].irqs[i + 1] = irqs[i];
|
|
+}
|
|
+
|
|
void __init cns3xxx_pcie_init_late(void)
|
|
{
|
|
int i;
|
|
--- a/arch/arm/mach-cns3xxx/core.h
|
|
+++ b/arch/arm/mach-cns3xxx/core.h
|
|
@@ -18,8 +18,10 @@ extern void cns3xxx_timer_init(void);
|
|
|
|
#ifdef CONFIG_PCI
|
|
extern void __init cns3xxx_pcie_init_late(void);
|
|
+extern void __init cns3xxx_pcie_set_irqs(int bus, int *irqs);
|
|
#else
|
|
static inline void __init cns3xxx_pcie_init_late(void) {}
|
|
+static inline void cns3xxx_pcie_set_irqs(int bus, int *irqs) {}
|
|
#endif
|
|
|
|
void __init cns3xxx_map_io(void);
|