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62b7f5931c
bcm2708: boot tested on RPi B+ v1.2
bcm2709: boot tested on RPi 3B v1.2 and RPi 4B v1.1 4G
bcm2710: boot tested on RPi 3B v1.2
bcm2711: boot tested on RPi 4B v1.1 4G
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
(cherry-picked from commit f07e572f64)
47 lines
1.6 KiB
Diff
47 lines
1.6 KiB
Diff
From 1257716d9bae9730c43c636046983f5d80c4efc8 Mon Sep 17 00:00:00 2001
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From: Phil Elwell <phil@raspberrypi.com>
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Date: Tue, 4 Feb 2020 13:03:21 +0000
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Subject: [PATCH] overlays: dwc2: Increase RX FIFO size
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The previous version of the dwc2 overlay set the RX FIFO size to
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256 4-byte words. This sounds large enough for a 1024 byte packet (the
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largest isochronous high speed packet allowed), but it doesn't take
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into account some extra space needed by the hardware.
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Minas Harutyunyan at Synopsys (the source of the DWC OTG design)
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came up with a more correct value, 301, but since there is spare packet
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RAM this can be increased to 558 to allow two packets per frame.
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Also update the upstream overlay to match.
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See: https://github.com/raspberrypi/linux/issues/3447
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Signed-off-by: Phil Elwell <phil@raspberrypi.com>
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---
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arch/arm/boot/dts/overlays/dwc2-overlay.dts | 2 +-
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arch/arm/boot/dts/overlays/upstream-overlay.dts | 2 +-
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2 files changed, 2 insertions(+), 2 deletions(-)
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--- a/arch/arm/boot/dts/overlays/dwc2-overlay.dts
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+++ b/arch/arm/boot/dts/overlays/dwc2-overlay.dts
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@@ -12,7 +12,7 @@
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compatible = "brcm,bcm2835-usb";
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dr_mode = "otg";
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g-np-tx-fifo-size = <32>;
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- g-rx-fifo-size = <256>;
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+ g-rx-fifo-size = <558>;
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g-tx-fifo-size = <512 512 512 512 512 256 256>;
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status = "okay";
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};
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--- a/arch/arm/boot/dts/overlays/upstream-overlay.dts
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+++ b/arch/arm/boot/dts/overlays/upstream-overlay.dts
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@@ -123,7 +123,7 @@
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compatible = "brcm,bcm2835-usb";
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dr_mode = "otg";
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g-np-tx-fifo-size = <32>;
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- g-rx-fifo-size = <256>;
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+ g-rx-fifo-size = <558>;
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g-tx-fifo-size = <512 512 512 512 512 256 256>;
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status = "okay";
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};
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