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a5d6a60fd0
This is an automatically generated commit. When doing `git bisect`, consider `git bisect --skip`. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
82 lines
1.9 KiB
Diff
82 lines
1.9 KiB
Diff
From ad4eba0c36ce8af6ab9ea1bc163e4c1ac7c271c3 Mon Sep 17 00:00:00 2001
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From: Hauke Mehrtens <hauke@hauke-m.de>
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Date: Sat, 15 Aug 2020 16:09:02 +0200
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Subject: [PATCH 903/904] MIPS: DTS: img: marduk: Add NXP SC16IS752IPW
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Add NXP SC16IS752IPW SPI-UART controller to device tree.
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This controller drives 2 UARTs and 7 LEDs on the board.
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Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
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---
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arch/mips/boot/dts/img/pistachio_marduk.dts | 51 +++++++++++++++++++++
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1 file changed, 51 insertions(+)
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--- a/arch/mips/boot/dts/img/pistachio_marduk.dts
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+++ b/arch/mips/boot/dts/img/pistachio_marduk.dts
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@@ -46,6 +46,46 @@
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regulator-max-microvolt = <1800000>;
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};
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+ /* EXT clock from ca8210 is fed to sc16is752 */
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+ ca8210_ext_clk: ca8210-ext-clk {
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+ compatible = "fixed-clock";
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+ #clock-cells = <0>;
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+ clock-frequency = <16000000>;
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+ clock-output-names = "ca8210_ext_clock";
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+ };
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+
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+ gpioleds {
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+ compatible = "gpio-leds";
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+ user1 {
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+ label = "marduk:red:user1";
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+ gpios = <&sc16is752 0 GPIO_ACTIVE_LOW>;
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+ };
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+ user2 {
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+ label = "marduk:red:user2";
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+ gpios = <&sc16is752 1 GPIO_ACTIVE_LOW>;
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+ };
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+ user3 {
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+ label = "marduk:red:user3";
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+ gpios = <&sc16is752 2 GPIO_ACTIVE_LOW>;
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+ };
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+ user4 {
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+ label = "marduk:red:user4";
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+ gpios = <&sc16is752 3 GPIO_ACTIVE_LOW>;
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+ };
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+ user5 {
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+ label = "marduk:red:user5";
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+ gpios = <&sc16is752 4 GPIO_ACTIVE_LOW>;
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+ };
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+ user6 {
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+ label = "marduk:red:user6";
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+ gpios = <&sc16is752 5 GPIO_ACTIVE_LOW>;
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+ };
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+ user7 {
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+ label = "marduk:red:user7";
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+ gpios = <&sc16is752 6 GPIO_ACTIVE_LOW>;
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+ };
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+ };
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+
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led-controller {
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compatible = "pwm-leds";
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@@ -96,6 +136,17 @@
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extclock-freq = <16000000>;
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extclock-gpio = <2>;
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};
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+
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+ sc16is752: sc16is752@1 {
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+ compatible = "nxp,sc16is752";
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+ reg = <1>;
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+ clocks = <&ca8210_ext_clk>;
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+ spi-max-frequency = <4000000>;
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+ interrupt-parent = <&gpio0>;
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+ interrupts = <11 IRQ_TYPE_EDGE_FALLING>;
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+ gpio-controller;
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+ #gpio-cells = <2>;
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+ };
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};
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&spfi1 {
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