openwrt/target/linux/realtek/dts-5.10/rtl931x.dtsi

// SPDX-License-Identifier: GPL-2.0-or-later OR MIT

#include <dt-bindings/interrupt-controller/mips-gic.h>

/ {
	#address-cells = <1>;
	#size-cells = <1>;
	
	compatible = "realtek,rtl838x-soc";

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;
		frequency = <1000000000>;

		cpu@0 {
			compatible = "mti,interaptive";
			reg = <0>;
		};

		cpu@1 {
			compatible = "mti,interaptive";
			reg = <1>;
		};
	};

	memory@0 {
		device_type = "memory";
		reg = <0x0 0x10000000>;
	};
	
	chosen {
		bootargs = "console=ttyS0,115200";
	};

	lx_clk: lx_clk {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <200000000>;
	};

	cpuclock: cpuclock@0 {
		#clock-cells = <0>;
		compatible = "fixed-clock";

		/* FIXME: there should be way to detect this */
		clock-frequency = <1000000000>;
	};

	cpuintc: cpuintc {
		compatible = "mti,cpu-interrupt-controller";
		#address-cells = <0>;
		#interrupt-cells = <1>;
		interrupt-controller;
	};

	gic: interrupt-controller@1ddc0000 {
		compatible = "mti,gic";
		reg = <0x1ddc0000 0x20000>;

		interrupt-controller;
		#interrupt-cells = <3>;

		/*
		 * Declare the interrupt-parent even though the mti,gic
		 * binding doesn't require it, such that the kernel can
		 * figure out that cpu_intc is the root interrupt
		 * controller & should be probed first.
		 */
		interrupt-parent = <&cpuintc>;

		timer {
			compatible = "mti,gic-timer";
			interrupts = <GIC_LOCAL 1 IRQ_TYPE_NONE>;
			clocks = <&cpuclock>;
		};
	};
	
	soc: soc {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0x0 0x18000000 0x10000>;

		spi0: spi@1200 {
			status = "okay";

			compatible = "realtek,rtl8380-spi";
			reg = <0x1200 0x100>;

			#address-cells = <1>;
			#size-cells = <0>;
		};

		watchdog0: watchdog@3260 {
			compatible = "realtek,rtl9310-wdt";
			reg = <0x3260 0xc>;

			realtek,reset-mode = "soc";

			clocks = <&lx_clk>;
			timeout-sec = <30>;

			interrupt-parent = <&gic>;
			interrupt-names = "phase1", "phase2";
			interrupts = <GIC_SHARED 8 IRQ_TYPE_LEVEL_HIGH>, <GIC_SHARED 9 IRQ_TYPE_LEVEL_HIGH>;
		};

		gpio0: gpio-controller@3300 {
			compatible = "realtek,rtl9310-gpio", "realtek,otto-gpio";
			reg = <0x3300 0x1c>;

			gpio-controller;
			#gpio-cells = <2>;
			ngpios = <32>;

			interrupt-controller;
			#interrupt-cells = <3>;
			interrupt-parent = <&gic>;
			interrupts = <GIC_SHARED 20 IRQ_TYPE_LEVEL_HIGH>;
		};

		uart0: uart@2000 {
			compatible = "ns16550a";
			reg = <0x2000 0x100>;

			clock-frequency = <200000000>;

			interrupt-parent = <&gic>;
			#interrupt-cells = <3>;
			interrupts = <GIC_SHARED 22 IRQ_TYPE_LEVEL_HIGH>;

			reg-io-width = <1>;
			reg-shift = <2>;
			fifo-size = <1>;
			no-loopback-test;
		};

		uart1: uart@2100 {
			compatible = "ns16550a";
			reg = <0x2100 0x100>;

			clock-frequency = <200000000>;

			interrupt-parent = <&gic>;
			#interrupt-cells = <3>;
			interrupts = <GIC_SHARED 23 IRQ_TYPE_LEVEL_HIGH>;

			reg-io-width = <1>;
			reg-shift = <2>;
			fifo-size = <1>;
			no-loopback-test;

			status = "disabled";
		};
	};


	ethernet0: ethernet@1b00a300 {
		status = "okay";
		compatible = "realtek,rtl838x-eth";
		reg = <0x1b00a300 0x100>;
		interrupt-parent = <&gic>;
		#interrupt-cells = <3>;
		interrupts = <GIC_SHARED 16 IRQ_TYPE_LEVEL_HIGH>;
		phy-mode = "internal";
		fixed-link {
			speed = <1000>;
			full-duplex;
		};
	};

	switch0: switch@1b000000 {
		compatible = "realtek,rtl83xx-switch";
		status = "okay";

		interrupt-parent = <&gic>;
		#interrupt-cells = <3>;
		interrupts = <GIC_SHARED 15 IRQ_TYPE_LEVEL_HIGH>;
	};
};