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a21210fbb7
Since the beginning there's been an issue with initializing the Atheros
based MiniPCIe wireless cards. Here's an example of kerenel log:
OF: PCI: host bridge /soc/pcie@d0070000 ranges:
OF: PCI: MEM 0xe8000000..0xe8ffffff -> 0xe8000000
OF: PCI: IO 0xe9000000..0xe900ffff -> 0xe9000000
advk-pcie d0070000.pcie: link up
advk-pcie d0070000.pcie: PCI host bridge to bus 0000:00
pci_bus 0000:00: root bus resource [bus 00-ff]
pci_bus 0000:00: root bus resource [mem0xe8000000-0xe8ffffff]
pci_bus 0000:00: root bus resource [io 0x0000-0xffff](bus address[0xe9000000-0xe900ffff])
pci 0000:00:00.0: BAR 0: assigned [mem0xe8000000-0xe801ffff 64bit]
pci 0000:00:00.0: BAR 6: assigned [mem0xe8020000-0xe802ffff pref]
[...]
advk-pcie d0070000.pcie: Posted PIO Response Status: CA,0xe00 @ 0x3c
advk-pcie d0070000.pcie: Posted PIO Response Status: CA,0xe00 @ 0x44
advk-pcie d0070000.pcie: Posted PIO Response Status: CA,0xe00 @ 0x4
ath9k 0000:00:00.0: enabling device (0000 -> 0002)
advk-pcie d0070000.pcie: Posted PIO Response Status: CA,0xe00 @ 0x3c
advk-pcie d0070000.pcie: Posted PIO Response Status: CA,0xe00 @ 0xc
advk-pcie d0070000.pcie: Posted PIO Response Status: CA,0xe00 @ 0x4
advk-pcie d0070000.pcie: Posted PIO Response Status: CA,0xe00 @ 0x40
ath9k 0000:00:00.0: request_irq failed
advk-pcie d0070000.pcie: Posted PIO Response Status: CA,0xe00 @ 0x4
ath9k: probe of 0000:00:00.0 failed with error -22
The same happens for ath5k cards, while ath10k card didn't appear at
all (not detected):
OF: PCI: host bridge /soc/pcie@d0070000 ranges:
OF: PCI: MEM 0xe8000000..0xe8ffffff -> 0xe8000000
OF: PCI: IO 0xe9000000..0xe900ffff -> 0xe9000000
advk-pcie d0070000.pcie: link never came up
advk-pcie d0070000.pcie: PCI host bridge to bus 0000:00
pci_bus 0000:00: root bus resource [bus 00-ff]
pci_bus 0000:00: root bus resource [mem0xe8000000-0xe8ffffff]
pci_bus 0000:00: root bus resource [io 0x0000-0xffff](bus address[0xe9000000-0xe900ffff])
advk-pcie d0070000.pcie: config read/write timed out
Following the issue on esppressobin.net forum [1] the workaround seems
to be limiting the speed of PCIe bridge to 1st generation. This fixed
the initialisation of all tested Atheros wireless cards.
The change shouldn't affect the performance for wireless cards,
it could reduce the performance of storage controller cards but since
OpenWrt focuses on wireless connectivity, fixing compatibility with
wireless cards should be a priority.
For the record, the iwlwifi and mt76 cards were not affected by this
issue.
1. http://espressobin.net/forums/topic/which-pcie-wlan-cards-are-supported
Signed-off-by: Tomasz Maciej Nowak <tomek_n@o2.pl>
(cherry picked from commit 772258044b)
44 lines
1.3 KiB
Diff
44 lines
1.3 KiB
Diff
From f70b629e488cc3f2a325ac35476f4f7ae502c5d0 Mon Sep 17 00:00:00 2001
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From: Tomasz Maciej Nowak <tmn505@gmail.com>
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Date: Thu, 14 Jun 2018 14:24:40 +0200
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Subject: [PATCH 1/2] PCI: aardvark: allow to specify link capability
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Use DT of_pci_get_max_link_speed() facility to allow specifying link
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capability. If none or unspecified value is given it falls back to gen2,
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which is default for Armada 3700 SoC.
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Signed-off-by: Tomasz Maciej Nowak <tmn505@gmail.com>
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---
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drivers/pci/host/pci-aardvark.c | 11 +++++++++--
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1 file changed, 9 insertions(+), 2 deletions(-)
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--- a/drivers/pci/host/pci-aardvark.c
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+++ b/drivers/pci/host/pci-aardvark.c
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@@ -272,6 +272,8 @@ static void advk_pcie_set_ob_win(struct
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static void advk_pcie_setup_hw(struct advk_pcie *pcie)
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{
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+ struct device *dev = &pcie->pdev->dev;
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+ struct device_node *node = dev->of_node;
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u32 reg;
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int i;
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@@ -311,10 +313,15 @@ static void advk_pcie_setup_hw(struct ad
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PCIE_CORE_CTRL2_TD_ENABLE;
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advk_writel(pcie, reg, PCIE_CORE_CTRL2_REG);
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- /* Set GEN2 */
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+ /* Set GEN */
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reg = advk_readl(pcie, PCIE_CORE_CTRL0_REG);
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reg &= ~PCIE_GEN_SEL_MSK;
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- reg |= SPEED_GEN_2;
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+ if (of_pci_get_max_link_speed(node) == 1)
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+ reg |= SPEED_GEN_1;
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+ else if (of_pci_get_max_link_speed(node) == 3)
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+ reg |= SPEED_GEN_3;
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+ else
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+ reg |= SPEED_GEN_2;
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advk_writel(pcie, reg, PCIE_CORE_CTRL0_REG);
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/* Set lane X1 */
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