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c03f264f6d
This also deactivates some workaround for erratas only seen in older CPU cores and L2 cores not used in this SoC. This partly reverts commit r44947. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> SVN-Revision: 47686
32 lines
1.1 KiB
Diff
32 lines
1.1 KiB
Diff
From f4ce7effe2253a325f8ba182903cbdf0d8698593 Mon Sep 17 00:00:00 2001
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From: Hauke Mehrtens <hauke@hauke-m.de>
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Date: Sat, 21 Nov 2015 15:29:47 +0100
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Subject: [PATCH] ARM: BCM5310X: activate erratas needed for SoC
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The BCM4708 I have, which is probably the first generation which got
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to the consumer market, is using a ARM Cortex-A9 rev r3p0 and a
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L2C-310 rev r3p2 L2 cache controller. There are 3 workarounds for known
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erratas in the Linux kernel which could be activated and will be in
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this patch. There are currently no workarounds which have to be
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activated for the L2C-310 rev r3p2 in Linux.
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Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
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Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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---
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arch/arm/mach-bcm/Kconfig | 4 ++++
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1 file changed, 4 insertions(+)
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--- a/arch/arm/mach-bcm/Kconfig
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+++ b/arch/arm/mach-bcm/Kconfig
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@@ -38,6 +38,10 @@ config ARCH_BCM_CYGNUS
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config ARCH_BCM_5301X
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bool "Broadcom BCM470X / BCM5301X ARM SoC" if ARCH_MULTI_V7
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select ARCH_BCM_IPROC
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+ select ARM_ERRATA_754322
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+ select ARM_ERRATA_775420
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+ select ARM_ERRATA_764369 if SMP
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+
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help
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Support for Broadcom BCM470X and BCM5301X SoCs with ARM CPU cores.
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