mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-19 21:58:04 +00:00
b92ec82235
Removed upstreamed: generic/backport-5.10/350-v5.18-MIPS-pgalloc-fix-memory-leak-caused-by-pgd_free.patch generic/pending-5.10/850-0014-PCI-aardvark-Fix-reading-PCI_EXP_RTSTA_PME-bit-on-em.patch ipq40xx/patches-5.10/105-ipq40xx-fix-sleep-clock.patch All patches automatically rebased. Build system: x86_64 Build-tested: bcm2711/RPi4B, mt7622/RT3200 Run-tested: bcm2711/RPi4B, mt7622/RT3200 Compile-/run-tested: ath79/generic (Archer C7 v2). Signed-off-by: John Audia <graysky@archlinux.us>
92 lines
3.2 KiB
Diff
92 lines
3.2 KiB
Diff
From fa73c200f181436eab859374657c53a73778d8ad Mon Sep 17 00:00:00 2001
|
|
From: =?UTF-8?q?Pali=20Roh=C3=A1r?= <pali@kernel.org>
|
|
Date: Fri, 26 Mar 2021 17:35:44 +0100
|
|
Subject: [PATCH] PCI: aardvark: Fix setting MSI address
|
|
MIME-Version: 1.0
|
|
Content-Type: text/plain; charset=UTF-8
|
|
Content-Transfer-Encoding: 8bit
|
|
|
|
MSI address for receiving MSI interrupts needs to be correctly set before
|
|
enabling processing of MSI interrupts.
|
|
|
|
Move code for setting PCIE_MSI_ADDR_LOW_REG and PCIE_MSI_ADDR_HIGH_REG
|
|
from advk_pcie_init_msi_irq_domain() to advk_pcie_setup_hw(), before
|
|
enabling PCIE_CORE_CTRL2_MSI_ENABLE.
|
|
|
|
After this we can remove the now unused member msi_msg, which was used
|
|
only for MSI doorbell address. MSI address can be any address which cannot
|
|
be used to DMA to. So change it to the address of the main struct advk_pcie.
|
|
|
|
Fixes: 8c39d710363c ("PCI: aardvark: Add Aardvark PCI host controller driver")
|
|
Signed-off-by: Pali Rohár <pali@kernel.org>
|
|
Acked-by: Marc Zyngier <maz@kernel.org>
|
|
Signed-off-by: Marek Behún <kabel@kernel.org>
|
|
Cc: stable@vger.kernel.org # f21a8b1b6837 ("PCI: aardvark: Move to MSI handling using generic MSI support")
|
|
---
|
|
drivers/pci/controller/pci-aardvark.c | 21 +++++++++------------
|
|
1 file changed, 9 insertions(+), 12 deletions(-)
|
|
|
|
--- a/drivers/pci/controller/pci-aardvark.c
|
|
+++ b/drivers/pci/controller/pci-aardvark.c
|
|
@@ -284,7 +284,6 @@ struct advk_pcie {
|
|
raw_spinlock_t msi_irq_lock;
|
|
DECLARE_BITMAP(msi_used, MSI_IRQ_NUM);
|
|
struct mutex msi_used_lock;
|
|
- u16 msi_msg;
|
|
int link_gen;
|
|
struct pci_bridge_emul bridge;
|
|
struct gpio_desc *reset_gpio;
|
|
@@ -479,6 +478,7 @@ static void advk_pcie_disable_ob_win(str
|
|
|
|
static void advk_pcie_setup_hw(struct advk_pcie *pcie)
|
|
{
|
|
+ phys_addr_t msi_addr;
|
|
u32 reg;
|
|
int i;
|
|
|
|
@@ -567,6 +567,11 @@ static void advk_pcie_setup_hw(struct ad
|
|
reg |= LANE_COUNT_1;
|
|
advk_writel(pcie, reg, PCIE_CORE_CTRL0_REG);
|
|
|
|
+ /* Set MSI address */
|
|
+ msi_addr = virt_to_phys(pcie);
|
|
+ advk_writel(pcie, lower_32_bits(msi_addr), PCIE_MSI_ADDR_LOW_REG);
|
|
+ advk_writel(pcie, upper_32_bits(msi_addr), PCIE_MSI_ADDR_HIGH_REG);
|
|
+
|
|
/* Enable MSI */
|
|
reg = advk_readl(pcie, PCIE_CORE_CTRL2_REG);
|
|
reg |= PCIE_CORE_CTRL2_MSI_ENABLE;
|
|
@@ -1186,10 +1191,10 @@ static void advk_msi_irq_compose_msi_msg
|
|
struct msi_msg *msg)
|
|
{
|
|
struct advk_pcie *pcie = irq_data_get_irq_chip_data(data);
|
|
- phys_addr_t msi_msg = virt_to_phys(&pcie->msi_msg);
|
|
+ phys_addr_t msi_addr = virt_to_phys(pcie);
|
|
|
|
- msg->address_lo = lower_32_bits(msi_msg);
|
|
- msg->address_hi = upper_32_bits(msi_msg);
|
|
+ msg->address_lo = lower_32_bits(msi_addr);
|
|
+ msg->address_hi = upper_32_bits(msi_addr);
|
|
msg->data = data->hwirq;
|
|
}
|
|
|
|
@@ -1348,18 +1353,10 @@ static struct msi_domain_info advk_msi_d
|
|
static int advk_pcie_init_msi_irq_domain(struct advk_pcie *pcie)
|
|
{
|
|
struct device *dev = &pcie->pdev->dev;
|
|
- phys_addr_t msi_msg_phys;
|
|
|
|
raw_spin_lock_init(&pcie->msi_irq_lock);
|
|
mutex_init(&pcie->msi_used_lock);
|
|
|
|
- msi_msg_phys = virt_to_phys(&pcie->msi_msg);
|
|
-
|
|
- advk_writel(pcie, lower_32_bits(msi_msg_phys),
|
|
- PCIE_MSI_ADDR_LOW_REG);
|
|
- advk_writel(pcie, upper_32_bits(msi_msg_phys),
|
|
- PCIE_MSI_ADDR_HIGH_REG);
|
|
-
|
|
pcie->msi_inner_domain =
|
|
irq_domain_add_linear(NULL, MSI_IRQ_NUM,
|
|
&advk_msi_domain_ops, pcie);
|