openwrt/target/linux/generic/pending-6.6/768-net-dsa-mv88e6xxx-Request-assisted-learning-on-CPU-port.patch
John Audia b733b6acb5 kernel: bump 6.6 to 6.6.44
Changelog: https://cdn.kernel.org/pub/linux/kernel/v6.x/ChangeLog-6.6.44

Removed upstreamed:
	rockchip/patches-6.6/044-v6.11-arm64-dts-rockchip-Add-sdmmc-related-properties-on-r.patch[1]
	rockchip/patches-6.6/045-v6.11-arm64-dts-rockchip-Add-pinctrl-for-UART0-to-rk3308-r.patch[2]
	rockchip/patches-6.6/046-v6.11-arm64-dts-rockchip-Add-mdio-and-ethernet-phy-nodes-t.patch[3]
	rockchip/patches-6.6/048-v6.11-arm64-dts-rockchip-Update-WIFi-BT-related-nodes-on-r.patch[4]
	rockchip/patches-6.6/310-PCI-dw-rockchip-Fix-initial-PERST-GPIO-value.patch[5]

Manually rebased:
	bcm27xx/patches-6.6/950-0526-mfd-Add-rp1-driver.patch
	ramips/patches-6.6/810-uvc-add-iPassion-iP2970-support.patch

All other patches automatically rebased.

1. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.6.44&id=96155dc8c99e76a0e58932ca5f88148a37af3617
2. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.6.44&id=30ee9e5ecc5fd6854a1690ab11e6e6b4851ac9ab
3. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.6.44&id=0c4c1b7daf23bccf0da5b65b3cd5b32bfa5a5af4
4. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.6.44&id=a86a5685675834732789df202e73153db59d8dcc
5. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.6.44&id=a30211c6704899de0616ac0f97601122d899c86d

Build system: x86/64
Build-tested: x86/64/AMD Cezanne
Run-tested: x86/64/AMD Cezanne

Signed-off-by: John Audia <therealgraysky@proton.me>
Link: https://github.com/openwrt/openwrt/pull/16061
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2024-08-06 00:40:42 +02:00

28 lines
1.1 KiB
Diff

From: Tobias Waldekranz <tobias@waldekranz.com>
Subject: [RFC net-next 7/7] net: dsa: mv88e6xxx: Request assisted learning on CPU port
Date: Sat, 16 Jan 2021 02:25:15 +0100
Archived-At: <https://lore.kernel.org/netdev/20210116012515.3152-8-tobias@waldekranz.com/>
While the hardware is capable of performing learning on the CPU port,
it requires alot of additions to the bridge's forwarding path in order
to handle multi-destination traffic correctly.
Until that is in place, opt for the next best thing and let DSA sync
the relevant addresses down to the hardware FDB.
Signed-off-by: Tobias Waldekranz <tobias@waldekranz.com>
---
drivers/net/dsa/mv88e6xxx/chip.c | 1 +
1 file changed, 1 insertion(+)
--- a/drivers/net/dsa/mv88e6xxx/chip.c
+++ b/drivers/net/dsa/mv88e6xxx/chip.c
@@ -6993,6 +6993,7 @@ static int mv88e6xxx_register_switch(str
ds->ops = &mv88e6xxx_switch_ops;
ds->ageing_time_min = chip->info->age_time_coeff;
ds->ageing_time_max = chip->info->age_time_coeff * U8_MAX;
+ ds->assisted_learning_on_cpu_port = true;
/* Some chips support up to 32, but that requires enabling the
* 5-bit port mode, which we do not support. 640k^W16 ought to