openwrt/target/linux/ath79/dts/qca9558_devolo_dvl1xxx.dtsi
David Bauer 62abbd587d ath79: correct various phy-mode properties
Upstream commit 6d4cd04 changes how the internal delays of the AR803x
based PHYs are enabled. With this commit, all internal delays are
disabled on driver probe and enabled based on the 'phy-mode' property in
the device-tree.

Before this commit, the RX delay was always enabled upon soft-reset
while the TX delay retained it's previous state. A hard reset enabled
the RX delay while the TX delay was disabled.

Because of this inconsistency, wrongly specified PHY-modes were working
correctly while the hardware was in a different state.

Fix the PHY-modes of some affected devices (and clean up misplaced
properties along the way) to keep the devices working flawlessly with
kernels >= 5.1.

Signed-off-by: David Bauer <mail@david-bauer.net>
2019-06-20 08:57:36 +02:00

151 lines
2.5 KiB
Plaintext

// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* The hardware of this board family is most likely shared with other devices
* from other manufacturers.
* Devolo seems to use hardware from Edimax, namely the Edimax WAP1750.
*
* The base board is identical but the single models differ in number of
* buttons, ethernet ports, external console, USB, external / internal
* antennas and number of spatial streams.
*/
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include "qca9557.dtsi"
/ {
chosen {
bootargs = "console=ttyS0,115200n8";
};
keys {
compatible = "gpio-keys";
reset {
label = "Reset button";
linux,code = <KEY_RESTART>;
gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
};
watchdog {
compatible = "linux,wdt-gpio";
gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
hw_algo = "toggle";
hw_margin_ms = <300>;
always-running;
};
};
&pcie0 {
status = "okay";
};
&uart {
status = "okay";
};
&gpio {
status = "okay";
};
&spi {
status = "okay";
num-cs = <1>;
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <25000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x000000 0x040000>;
read-only;
};
partition@40000 {
label = "u-boot-env";
reg = <0x040000 0x010000>;
read-only;
};
art: partition@50000 {
label = "art";
reg = <0x050000 0x010000>;
read-only;
};
partition@60000 {
label = "art_bak";
reg = <0x060000 0x010000>;
read-only;
};
partition@70000 {
compatible = "denx,uimage";
label = "firmware";
reg = <0x070000 0xf90000>;
};
};
};
};
&mdio0 {
status = "okay";
phy4: ethernet-phy@4 {
reg = <4>;
at803x-disable-smarteee;
};
};
&eth0 {
status = "okay";
mtd-mac-address = <&art 0x00>;
phy-handle = <&phy4>;
phy-mode = "rgmii-rxid";
pll-data = <0xae000000 0x80000101 0x80001313>;
gmac_config: gmac-config {
device = <&gmac>;
rxdv-delay = <3>;
rxd-delay = <3>;
txen-delay = <0>;
txd-delay = <0>;
rgmii-enabled = <1>;
};
};
&mdio1 {
phy1: ethernet-phy@1 {
reg = <1>;
};
};
&eth1 {
mtd-mac-address = <&art 0x00>;
mtd-mac-address-increment = <1>;
phy-handle = <&phy1>;
pll-data = <0x03000101 0x00000101 0x00001313>;
};
&wmac {
status = "okay";
mtd-cal-data = <&art 0x1000>;
mtd-mac-address = <&art 0x00>;
mtd-mac-address-increment = <(-2)>;
};