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e4ce3109f2
The node pinctrl0 is already set up in the SOC DTSI files, but defined again as member of pinctrl in most of the device DTS(I) files. This patch removes this redundancy for the entire ramips target. Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
185 lines
3.1 KiB
Plaintext
185 lines
3.1 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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/dts-v1/;
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#include "mt7621.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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/ {
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compatible = "xiaomi,mir3p", "mediatek,mt7621-soc";
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model = "Xiaomi Mi Router 3 Pro";
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aliases {
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led-boot = &led_status_yellow;
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led-failsafe = &led_status_red;
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led-running = &led_status_blue;
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led-upgrade = &led_status_yellow;
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};
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chosen {
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bootargs = "console=ttyS0,115200n8";
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};
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leds {
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compatible = "gpio-leds";
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led_status_red: status_red {
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label = "mir3p:red:status";
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gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
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};
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led_status_blue: status_blue {
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label = "mir3p:blue:status";
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gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
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};
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led_status_yellow: status_yellow {
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label = "mir3p:yellow:status";
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gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
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};
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wan_amber {
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label = "mir3p:amber:wan";
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gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
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};
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lan3_amber {
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label = "mir3p:amber:lan3";
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gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
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};
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lan2_amber {
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label = "mir3p:amber:lan2";
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gpios = <&gpio0 16 GPIO_ACTIVE_LOW>;
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};
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lan1_amber {
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label = "mir3p:amber:lan1";
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gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
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};
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};
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keys {
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compatible = "gpio-keys";
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reset {
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label = "reset";
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gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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};
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};
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reg_usb_vbus: regulator {
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compatible = "regulator-fixed";
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regulator-name = "usb_vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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};
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&xhci {
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vbus-supply = <®_usb_vbus>;
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};
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&nand {
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status = "okay";
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "Bootloader";
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reg = <0x0 0x40000>;
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read-only;
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};
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partition@40000 {
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label = "Config";
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reg = <0x40000 0x40000>;
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};
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partition@80000 {
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label = "Bdata";
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reg = <0x80000 0x40000>;
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read-only;
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};
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factory: partition@c0000 {
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label = "factory";
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reg = <0x0c0000 0x40000>;
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read-only;
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};
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partition@100000 {
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label = "crash";
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reg = <0x100000 0x40000>;
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};
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partition@140000 {
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label = "crash_syslog";
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reg = <0x140000 0x80000>;
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};
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partition@1c0000 {
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label = "reserved0";
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reg = <0x1c0000 0x40000>;
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read-only;
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};
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/* We keep stock xiaomi firmware (kernel0) here */
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partition@200000 {
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label = "kernel_stock";
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reg = <0x200000 0x400000>;
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};
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partition@600000 {
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label = "kernel";
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reg = <0x600000 0x400000>;
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};
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partition@a00000 {
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label = "ubi";
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reg = <0xa00000 0xf580000>;
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};
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};
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};
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&pcie {
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status = "okay";
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};
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&pcie0 {
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wifi@0,0 {
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compatible = "mediatek,mt76";
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reg = <0x0000 0 0 0 0>;
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mediatek,mtd-eeprom = <&factory 0x0000>;
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ieee80211-freq-limit = <2400000 2500000>;
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};
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};
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&pcie1 {
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wifi@0,0 {
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compatible = "mediatek,mt76";
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reg = <0x0000 0 0 0 0>;
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mediatek,mtd-eeprom = <&factory 0x8000>;
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ieee80211-freq-limit = <5000000 6000000>;
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};
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};
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ðernet {
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mtd-mac-address = <&factory 0xe000>;
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mediatek,portmap = "llllw";
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};
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&state_default {
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gpio {
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ralink,group = "jtag", "uart2", "uart3", "wdt";
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ralink,function = "gpio";
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};
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};
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