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e4ce3109f2
The node pinctrl0 is already set up in the SOC DTSI files, but defined again as member of pinctrl in most of the device DTS(I) files. This patch removes this redundancy for the entire ramips target. Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
164 lines
2.7 KiB
Plaintext
164 lines
2.7 KiB
Plaintext
/dts-v1/;
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#include "mt7621.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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/ {
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compatible = "tplink,re350-v1", "mediatek,mt7621-soc";
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model = "TP-LINK RE350 v1";
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aliases {
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led-boot = &led_power;
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led-failsafe = &led_power;
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led-running = &led_power;
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led-upgrade = &led_power;
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};
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chosen {
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bootargs = "console=ttyS0,57600";
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};
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leds {
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compatible = "gpio-leds";
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led_power: power {
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label = "re350-v1:blue:power";
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gpios = <&gpio0 22 GPIO_ACTIVE_LOW>;
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};
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wifi2g {
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label = "re350-v1:blue:wifi2G";
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gpios = <&gpio0 23 GPIO_ACTIVE_LOW>;
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};
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wifi5g {
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label = "re350-v1:blue:wifi5G";
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gpios = <&gpio0 24 GPIO_ACTIVE_LOW>;
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};
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wps_r {
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label = "re350-v1:red:wps";
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gpios = <&gpio0 25 GPIO_ACTIVE_HIGH>;
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};
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wps_b {
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label = "re350-v1:blue:wps";
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gpios = <&gpio0 26 GPIO_ACTIVE_HIGH>;
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};
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eth {
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label = "re350-v1:green:eth_act";
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gpios = <&gpio0 28 GPIO_ACTIVE_LOW>;
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};
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eth2 {
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label = "re350-v1:green:eth_link";
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gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
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};
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};
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keys {
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compatible = "gpio-keys";
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led {
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label = "led";
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gpios = <&gpio0 30 GPIO_ACTIVE_LOW>;
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linux,code = <BTN_0>;
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};
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reset {
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label = "reset";
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gpios = <&gpio0 31 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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};
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power {
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label = "power";
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gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_POWER>;
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};
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wps {
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label = "wps";
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gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_WPS_BUTTON>;
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};
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};
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};
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&spi0 {
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status = "okay";
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w25q64@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <10000000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "u-boot";
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reg = <0x0 0x20000>;
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read-only;
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};
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partition@20000 {
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compatible = "tplink,firmware";
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label = "firmware";
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reg = <0x20000 0x5e0000>;
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};
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config: partition@600000 {
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label = "config";
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reg = <0x600000 0x50000>;
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read-only;
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};
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radio: partition@7f0000 {
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label = "radio";
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reg = <0x7f0000 0x10000>;
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read-only;
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};
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};
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};
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};
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&pcie {
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status = "okay";
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};
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&pcie0 {
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mt76@0,0 {
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reg = <0x0000 0 0 0 0>;
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mediatek,mtd-eeprom = <&radio 0>;
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mtd-mac-address = <&config 0x10008>;
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mtd-mac-address-increment = <1>;
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};
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};
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&pcie1 {
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mt76@0,0 {
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reg = <0x0000 0 0 0 0>;
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mediatek,mtd-eeprom = <&radio 0x8000>;
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ieee80211-freq-limit = <5000000 6000000>;
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mtd-mac-address = <&config 0x10008>;
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mtd-mac-address-increment = <2>;
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};
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};
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ðernet {
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mtd-mac-address = <&config 0x10008>;
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};
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&state_default {
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gpio {
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ralink,group = "rgmii2", "wdt";
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ralink,function = "gpio";
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};
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};
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