mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-19 13:48:06 +00:00
9131cb44ff
Introduce EN7581 SoC support with currently rfb board supported. This is a new 64bit SoC from Airoha that is currently almost fully supported upstream with only the DTS missing. Setting source-only waiting for the full upstream support to be completed. Link: https://github.com/openwrt/openwrt/pull/16730 Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
255 lines
4.0 KiB
Plaintext
255 lines
4.0 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
|
/dts-v1/;
|
|
|
|
/* Bootloader installs ATF here */
|
|
/memreserve/ 0x80000000 0x200000;
|
|
|
|
#include <dt-bindings/leds/common.h>
|
|
#include <dt-bindings/gpio/gpio.h>
|
|
#include <dt-bindings/input/input.h>
|
|
#include "en7581.dtsi"
|
|
|
|
/ {
|
|
model = "Airoha EN7581 Evaluation Board";
|
|
compatible = "airoha,en7581-evb", "airoha,en7581";
|
|
|
|
aliases {
|
|
serial0 = &uart1;
|
|
};
|
|
|
|
chosen {
|
|
bootargs = "console=ttyS0,115200 earlycon";
|
|
stdout-path = "serial0:115200n8";
|
|
linux,usable-memory-range = <0x0 0x80200000 0x0 0x1fe00000>;
|
|
};
|
|
|
|
memory@80000000 {
|
|
device_type = "memory";
|
|
reg = <0x0 0x80000000 0x2 0x00000000>;
|
|
};
|
|
|
|
gpio-keys-polled {
|
|
compatible = "gpio-keys-polled";
|
|
poll-interval = <100>;
|
|
btn0 {
|
|
label = "reset";
|
|
linux,code = <KEY_RESTART>;
|
|
gpios = <&en7581_pinctrl 0 GPIO_ACTIVE_LOW>;
|
|
};
|
|
};
|
|
|
|
pwmleds {
|
|
compatible = "pwm-leds";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pwm_gpio18_idx10_pins>;
|
|
lan4_green {
|
|
label = "pon:green";
|
|
pwms = <&en7581_pwm 10 4000000 0>;
|
|
max-brightness = <255>;
|
|
active-low;
|
|
};
|
|
};
|
|
|
|
|
|
leds {
|
|
compatible = "gpio-leds";
|
|
|
|
pwr_led: led-0 {
|
|
label = "pwr";
|
|
color = <LED_COLOR_ID_RED>;
|
|
function = LED_FUNCTION_POWER;
|
|
gpios = <&en7581_pinctrl 17 GPIO_ACTIVE_LOW>;
|
|
default-state = "on";
|
|
};
|
|
|
|
los_led: led-2 {
|
|
label = "los";
|
|
color = <LED_COLOR_ID_GREEN>;
|
|
function = LED_FUNCTION_STATUS;
|
|
gpios = <&en7581_pinctrl 19 GPIO_ACTIVE_LOW>;
|
|
default-state = "on";
|
|
};
|
|
|
|
internet_led: led-3 {
|
|
label = "internet";
|
|
color = <LED_COLOR_ID_GREEN>;
|
|
function = LED_FUNCTION_STATUS;
|
|
gpios = <&en7581_pinctrl 20 GPIO_ACTIVE_LOW>;
|
|
default-state = "on";
|
|
};
|
|
};
|
|
};
|
|
|
|
&en7581_pinctrl {
|
|
gpio-ranges = <&en7581_pinctrl 0 13 47>;
|
|
|
|
mdio_pins: mdio-pins {
|
|
mux {
|
|
function = "mdio";
|
|
groups = "mdio";
|
|
};
|
|
|
|
conf {
|
|
pins = "gpio2";
|
|
output-high;
|
|
};
|
|
};
|
|
|
|
pcie0_rst_pins: pcie0-rst-pins {
|
|
conf {
|
|
pins = "pcie_reset0";
|
|
drive-open-drain = <1>;
|
|
};
|
|
};
|
|
|
|
pcie1_rst_pins: pcie1-rst-pins {
|
|
conf {
|
|
pins = "pcie_reset1";
|
|
drive-open-drain = <1>;
|
|
};
|
|
};
|
|
|
|
gswp1_led0_pins: gswp1-led0-pins {
|
|
mux {
|
|
function = "phy1_led0";
|
|
pins = "gpio33";
|
|
};
|
|
};
|
|
|
|
gswp2_led0_pins: gswp2-led0-pins {
|
|
mux {
|
|
function = "phy2_led0";
|
|
pins = "gpio34";
|
|
};
|
|
};
|
|
|
|
gswp3_led0_pins: gswp3-led0-pins {
|
|
mux {
|
|
function = "phy3_led0";
|
|
pins = "gpio35";
|
|
};
|
|
};
|
|
|
|
gswp4_led0_pins: gswp4-led0-pins {
|
|
mux {
|
|
function = "phy4_led0";
|
|
pins = "gpio42";
|
|
};
|
|
};
|
|
|
|
pwm_gpio18_idx10_pins: pwm-gpio18-idx10-pins {
|
|
function = "pwm";
|
|
pins = "gpio18";
|
|
output-enable;
|
|
};
|
|
};
|
|
|
|
&snfi {
|
|
status = "okay";
|
|
};
|
|
|
|
&spi_nand {
|
|
partitions {
|
|
compatible = "airoha,fixed-partitions";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
|
|
bootloader@0 {
|
|
label = "bootloader";
|
|
reg = <0x00000000 0x00080000>;
|
|
};
|
|
|
|
tclinux@80000 {
|
|
label = "tclinux";
|
|
compatible = "denx,fit";
|
|
reg = <0x00080000 0x02800000>;
|
|
};
|
|
|
|
tclinux_slave@2880000 {
|
|
label = "tclinux_slave";
|
|
reg = <0x02880000 0x02800000>;
|
|
};
|
|
|
|
rootfs_data@5080000 {
|
|
label = "rootfs_data";
|
|
reg = <0x5080000 0x00800000>;
|
|
};
|
|
|
|
art@ffffffff {
|
|
compatible = "airoha,dynamic-art";
|
|
label = "art";
|
|
reg = <0xffffffff 0x00300000>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&i2c0 {
|
|
status = "okay";
|
|
};
|
|
|
|
&pcie0 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pcie0_rst_pins>;
|
|
status = "okay";
|
|
};
|
|
|
|
&pcie1 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pcie1_rst_pins>;
|
|
status = "okay";
|
|
};
|
|
|
|
ð {
|
|
status = "okay";
|
|
};
|
|
|
|
&gdm1 {
|
|
status = "okay";
|
|
};
|
|
|
|
&switch {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&mdio_pins>;
|
|
status = "okay";
|
|
};
|
|
|
|
&gsw_phy1 {
|
|
pinctrl-names = "led";
|
|
pinctrl-0 = <&gswp1_led0_pins>;
|
|
status = "okay";
|
|
};
|
|
|
|
&gsw_phy1_led0 {
|
|
status = "okay";
|
|
};
|
|
|
|
&gsw_phy2 {
|
|
pinctrl-names = "led";
|
|
pinctrl-0 = <&gswp2_led0_pins>;
|
|
status = "okay";
|
|
};
|
|
|
|
&gsw_phy2_led0 {
|
|
status = "okay";
|
|
};
|
|
|
|
&gsw_phy3 {
|
|
pinctrl-names = "led";
|
|
pinctrl-0 = <&gswp3_led0_pins>;
|
|
status = "okay";
|
|
};
|
|
|
|
&gsw_phy3_led0 {
|
|
status = "okay";
|
|
};
|
|
|
|
&gsw_phy4 {
|
|
pinctrl-names = "led";
|
|
pinctrl-0 = <&gswp4_led0_pins>;
|
|
status = "okay";
|
|
};
|
|
|
|
&gsw_phy4_led0 {
|
|
status = "okay";
|
|
};
|