mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-20 22:23:27 +00:00
171 lines
4.8 KiB
Diff
171 lines
4.8 KiB
Diff
diff -urN linux-2.6.21.1.old/drivers/mtd/chips/cfi_cmdset_0001.c linux-2.6.21.1.dev/drivers/mtd/chips/cfi_cmdset_0001.c
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--- linux-2.6.21.1.old/drivers/mtd/chips/cfi_cmdset_0001.c 2007-04-27 23:49:26.000000000 +0200
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+++ linux-2.6.21.1.dev/drivers/mtd/chips/cfi_cmdset_0001.c 2007-05-26 19:40:46.809023552 +0200
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@@ -919,7 +919,7 @@
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static int __xipram xip_wait_for_operation(
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struct map_info *map, struct flchip *chip,
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- unsigned long adr, unsigned int chip_op_time )
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+ unsigned long adr, int *chip_op_time )
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{
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struct cfi_private *cfi = map->fldrv_priv;
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struct cfi_pri_intelext *cfip = cfi->cmdset_priv;
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@@ -928,7 +928,7 @@
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flstate_t oldstate, newstate;
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start = xip_currtime();
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- usec = chip_op_time * 8;
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+ usec = *chip_op_time * 8;
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if (usec == 0)
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usec = 500000;
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done = 0;
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@@ -1038,8 +1038,8 @@
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#define XIP_INVAL_CACHED_RANGE(map, from, size) \
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INVALIDATE_CACHED_RANGE(map, from, size)
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-#define INVAL_CACHE_AND_WAIT(map, chip, cmd_adr, inval_adr, inval_len, usec) \
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- xip_wait_for_operation(map, chip, cmd_adr, usec)
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+#define INVAL_CACHE_AND_WAIT(map, chip, cmd_adr, inval_adr, inval_len, p_usec) \
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+ xip_wait_for_operation(map, chip, cmd_adr, p_usec)
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#else
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@@ -1051,65 +1051,65 @@
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static int inval_cache_and_wait_for_operation(
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struct map_info *map, struct flchip *chip,
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unsigned long cmd_adr, unsigned long inval_adr, int inval_len,
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- unsigned int chip_op_time)
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+ int *chip_op_time )
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{
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struct cfi_private *cfi = map->fldrv_priv;
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map_word status, status_OK = CMD(0x80);
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- int chip_state = chip->state;
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- unsigned int timeo, sleep_time;
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+ int z, chip_state = chip->state;
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+ unsigned long timeo;
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spin_unlock(chip->mutex);
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if (inval_len)
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INVALIDATE_CACHED_RANGE(map, inval_adr, inval_len);
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+ if (*chip_op_time)
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+ cfi_udelay(*chip_op_time);
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spin_lock(chip->mutex);
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- /* set our timeout to 8 times the expected delay */
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- timeo = chip_op_time * 8;
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- if (!timeo)
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- timeo = 500000;
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- sleep_time = chip_op_time / 2;
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+ timeo = *chip_op_time * 8 * HZ / 1000000;
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+ if (timeo < HZ/2)
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+ timeo = HZ/2;
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+ timeo += jiffies;
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+ z = 0;
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for (;;) {
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+ if (chip->state != chip_state) {
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+ /* Someone's suspended the operation: sleep */
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+ DECLARE_WAITQUEUE(wait, current);
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+
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+ set_current_state(TASK_UNINTERRUPTIBLE);
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+ add_wait_queue(&chip->wq, &wait);
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+ spin_unlock(chip->mutex);
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+ schedule();
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+ remove_wait_queue(&chip->wq, &wait);
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+ timeo = jiffies + (HZ / 2); /* FIXME */
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+ spin_lock(chip->mutex);
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+ continue;
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+ }
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+
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status = map_read(map, cmd_adr);
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if (map_word_andequal(map, status, status_OK, status_OK))
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break;
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- if (!timeo) {
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+ /* OK Still waiting */
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+ if (time_after(jiffies, timeo)) {
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map_write(map, CMD(0x70), cmd_adr);
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chip->state = FL_STATUS;
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return -ETIME;
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}
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- /* OK Still waiting. Drop the lock, wait a while and retry. */
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+ /* Latency issues. Drop the lock, wait a while and retry */
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+ z++;
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spin_unlock(chip->mutex);
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- if (sleep_time >= 1000000/HZ) {
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- /*
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- * Half of the normal delay still remaining
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- * can be performed with a sleeping delay instead
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- * of busy waiting.
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- */
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- msleep(sleep_time/1000);
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- timeo -= sleep_time;
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- sleep_time = 1000000/HZ;
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- } else {
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- udelay(1);
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- cond_resched();
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- timeo--;
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- }
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+ cfi_udelay(1);
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spin_lock(chip->mutex);
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-
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- while (chip->state != chip_state) {
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- /* Someone's suspended the operation: sleep */
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- DECLARE_WAITQUEUE(wait, current);
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- set_current_state(TASK_UNINTERRUPTIBLE);
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- add_wait_queue(&chip->wq, &wait);
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- spin_unlock(chip->mutex);
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- schedule();
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- remove_wait_queue(&chip->wq, &wait);
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- spin_lock(chip->mutex);
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- }
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}
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+ if (!z) {
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+ if (!--(*chip_op_time))
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+ *chip_op_time = 1;
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+ } else if (z > 1)
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+ ++(*chip_op_time);
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+
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/* Done and happy. */
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chip->state = FL_STATUS;
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return 0;
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@@ -1118,7 +1118,8 @@
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#endif
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#define WAIT_TIMEOUT(map, chip, adr, udelay) \
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- INVAL_CACHE_AND_WAIT(map, chip, adr, 0, 0, udelay);
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+ ({ int __udelay = (udelay); \
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+ INVAL_CACHE_AND_WAIT(map, chip, adr, 0, 0, &__udelay); })
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static int do_point_onechip (struct map_info *map, struct flchip *chip, loff_t adr, size_t len)
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@@ -1342,7 +1343,7 @@
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ret = INVAL_CACHE_AND_WAIT(map, chip, adr,
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adr, map_bankwidth(map),
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- chip->word_write_time);
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+ &chip->word_write_time);
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if (ret) {
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xip_enable(map, chip, adr);
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printk(KERN_ERR "%s: word write error (status timeout)\n", map->name);
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@@ -1579,7 +1580,7 @@
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ret = INVAL_CACHE_AND_WAIT(map, chip, cmd_adr,
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adr, len,
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- chip->buffer_write_time);
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+ &chip->buffer_write_time);
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if (ret) {
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map_write(map, CMD(0x70), cmd_adr);
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chip->state = FL_STATUS;
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@@ -1714,7 +1715,7 @@
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ret = INVAL_CACHE_AND_WAIT(map, chip, adr,
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adr, len,
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- chip->erase_time);
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+ &chip->erase_time);
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if (ret) {
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map_write(map, CMD(0x70), adr);
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chip->state = FL_STATUS;
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