openwrt/0099-pci-mt7620.patch at f621b539512e5b6c83dd2de1bc2dba06e40cd7ea - openwrt - Gitea

ExternalVendorCode/openwrt

mirror of https://github.com/openwrt/openwrt.git synced 2024-12-27 01:11:14 +00:00

Stijn Tintel f997478655 kernel: bump 4.9 to 4.9.67

Refresh patches.
Remove upstreamed patches:
- generic/190-1-5-e1000e-Fix-error-path-in-link-detection.patch
- generic/190-3-5-e1000e-Fix-return-value-test.patch
- generic/190-4-5-e1000e-Separate-signaling-for-link-check-link-up.patch
- generic/190-5-5-e1000e-Avoid-receiver-overrun-interrupt-bursts.patch
- ramips/0102-MIPS-ralink-Fix-MT7628-pinmux.patch
- ramips/0103-MIPS-ralink-Fix-typo-in-mt7628-pinmux-function
Update patches that no longer apply:
- layerscape/815-spi-support-layerscape.patch
- ramips/0099-pci-mt7620.patch

Compile-tested on ar71xx, brcm2708/bcm2708, octeon and x86/64.
Runtime-tested on ar71xx, brcm2708/bcm2708, octeon and x86/64.

Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>

2017-12-07 01:41:09 +02:00

11 lines

233 B

Diff

Raw Blame History

 --- a/arch/mips/pci/pci-mt7620.c
 +++ b/arch/mips/pci/pci-mt7620.c
@@ -33,7 +33,6 @@
  #define RALINK_GPIOMODE			0x60
  #define PPLL_CFG1			0x9c
 -#define PDRV_SW_SET			BIT(23)
  #define PPLL_DRV			0xa0
  #define PDRV_SW_SET			(1<<31)