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d07cec6b2b
This patch converts ath10k calibration data to NVMEM format for wave 1 devices with built-in MAC address. The "calibration" NVMEM cell size is 0x844. Signed-off-by: Shiji Yang <yangshiji66@qq.com>
119 lines
2.2 KiB
Plaintext
119 lines
2.2 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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#include "qca9556_avm_fritz-repeater.dtsi"
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/ {
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compatible = "avm,fritzdvbc", "qca,qca9556";
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model = "AVM FRITZ!WLAN Repeater DVB-C";
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aliases {
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led-boot = &led_power;
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led-failsafe = &led_power;
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led-running = &led_power;
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led-upgrade = &led_power;
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};
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led_spi {
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compatible = "spi-gpio";
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#address-cells = <1>;
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#size-cells = <0>;
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sck-gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
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mosi-gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
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num-chipselects = <0>;
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spi_gpio: led_gpio@0 {
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compatible = "fairchild,74hc595";
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reg = <0>;
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gpio-controller;
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#gpio-cells = <2>;
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registers-number = <2>;
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spi-max-frequency = <10000000>;
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gpio_latch_bit {
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gpio-hog;
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gpios = <16 GPIO_ACTIVE_HIGH>;
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output-high;
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line-name = "gpio-latch-bit";
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};
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};
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};
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/*
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* GPIO pins 100 or greater in the vendor GPL dump are redirected
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* to the shift register.
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* So OEM source pin 100 becomes 0 on the SR and so forth.
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*/
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leds {
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compatible = "gpio-leds";
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led_power: power {
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label = "green:power";
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gpios = <&spi_gpio 6 GPIO_ACTIVE_LOW>;
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};
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wlan {
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label = "green:wlan";
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gpios = <&spi_gpio 7 GPIO_ACTIVE_LOW>;
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linux,default-trigger = "phy1tpt";
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};
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tv {
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label = "green:tv";
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gpios = <&spi_gpio 5 GPIO_ACTIVE_LOW>;
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};
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rssihigh {
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label = "green:rssihigh";
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gpios = <&spi_gpio 1 GPIO_ACTIVE_LOW>;
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};
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rssimediumhigh {
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label = "green:rssimediumhigh";
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gpios = <&spi_gpio 2 GPIO_ACTIVE_LOW>;
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};
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rssimedium {
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label = "green:rssimedium";
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gpios = <&spi_gpio 3 GPIO_ACTIVE_LOW>;
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};
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rssimediumlow {
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label = "green:rssimediumlow";
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gpios = <&spi_gpio 4 GPIO_ACTIVE_LOW>;
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};
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rssilow {
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label = "green:rssilow";
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gpios = <&spi_gpio 0 GPIO_ACTIVE_LOW>;
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};
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};
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};
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&pcie0 {
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status = "okay";
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wifi@0,0 {
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compatible = "qcom,ath10k";
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reg = <0x0000 0 0 0 0>;
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nvmem-cells = <&cal_urlader_198a>;
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nvmem-cell-names = "calibration";
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};
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};
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&gpio {
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reset-pcie-ep {
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gpio-hog;
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gpios = <109 GPIO_ACTIVE_HIGH>;
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output-high;
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line-name = "PCIE EP reset";
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};
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reset-pcie-bus {
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gpio-hog;
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gpios = <110 GPIO_ACTIVE_HIGH>;
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output-high;
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line-name = "PCIE Bus reset";
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};
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};
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