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As usual, this patches were taken (and rebased) from https://github.com/raspberrypi/linux/commits/rpi-4.1.y Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> SVN-Revision: 47258
492 lines
14 KiB
Diff
492 lines
14 KiB
Diff
From 3103b6c1b1a881e55421b7463fb76ad7bdf3974a Mon Sep 17 00:00:00 2001
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From: Luke Wren <wren6991@gmail.com>
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Date: Sat, 5 Sep 2015 01:16:10 +0100
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Subject: [PATCH 190/203] Add SMI NAND driver
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Signed-off-by: Luke Wren <wren6991@gmail.com>
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---
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.../bindings/mtd/brcm,bcm2835-smi-nand.txt | 42 ++++
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arch/arm/boot/dts/overlays/Makefile | 1 +
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arch/arm/boot/dts/overlays/smi-nand-overlay.dts | 69 ++++++
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arch/arm/configs/bcm2709_defconfig | 7 +
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arch/arm/configs/bcmrpi_defconfig | 7 +
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drivers/mtd/nand/Kconfig | 7 +
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drivers/mtd/nand/Makefile | 1 +
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drivers/mtd/nand/bcm2835_smi_nand.c | 268 +++++++++++++++++++++
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8 files changed, 402 insertions(+)
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create mode 100644 Documentation/devicetree/bindings/mtd/brcm,bcm2835-smi-nand.txt
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create mode 100644 arch/arm/boot/dts/overlays/smi-nand-overlay.dts
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create mode 100644 drivers/mtd/nand/bcm2835_smi_nand.c
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--- /dev/null
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+++ b/Documentation/devicetree/bindings/mtd/brcm,bcm2835-smi-nand.txt
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@@ -0,0 +1,42 @@
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+* BCM2835 SMI NAND flash
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+
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+This driver is a shim between the BCM2835 SMI driver (SMI is a peripheral for
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+talking to parallel register interfaces) and Linux's MTD layer.
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+
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+Required properties:
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+- compatible: "brcm,bcm2835-smi-nand"
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+- status: "okay"
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+
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+Optional properties:
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+- partition@n, where n is an integer from a consecutive sequence starting at 0
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+ - Difficult to store partition table on NAND device - normally put it
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+ in the source code, kernel bootparams, or device tree (the best way!)
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+ - Sub-properties:
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+ - label: the partition name, as shown by mtdinfo /dev/mtd*
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+ - reg: the size and offset of this partition.
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+ - (optional) read-only: an empty property flagging as read only
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+
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+Example:
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+
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+nand: flash@0 {
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+ compatible = "brcm,bcm2835-smi-nand";
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+ status = "okay";
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+
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+ partition@0 {
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+ label = "stage2";
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+ // 128k
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+ reg = <0 0x20000>;
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+ read-only;
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+ };
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+ partition@1 {
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+ label = "firmware";
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+ // 16M
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+ reg = <0x20000 0x1000000>;
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+ read-only;
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+ };
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+ partition@2 {
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+ label = "root";
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+ // 2G
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+ reg = <0x1020000 0x80000000>;
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+ };
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+};
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\ No newline at end of file
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--- a/arch/arm/boot/dts/overlays/Makefile
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+++ b/arch/arm/boot/dts/overlays/Makefile
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@@ -15,6 +15,7 @@ endif
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dtb-$(RPI_DT_OVERLAYS) += ads7846-overlay.dtb
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dtb-$(RPI_DT_OVERLAYS) += smi-overlay.dtb
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dtb-$(RPI_DT_OVERLAYS) += smi-dev-overlay.dtb
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+dtb-$(RPI_DT_OVERLAYS) += smi-nand-overlay.dtb
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dtb-$(RPI_DT_OVERLAYS) += bmp085_i2c-sensor-overlay.dtb
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dtb-$(RPI_DT_OVERLAYS) += dht11-overlay.dtb
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dtb-$(RPI_DT_OVERLAYS) += enc28j60-overlay.dtb
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--- /dev/null
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+++ b/arch/arm/boot/dts/overlays/smi-nand-overlay.dts
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@@ -0,0 +1,69 @@
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+// Description: Overlay to enable NAND flash through
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+// the secondary memory interface
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+// Author: Luke Wren
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+
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+/dts-v1/;
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+/plugin/;
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+
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+/{
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+ compatible = "brcm,bcm2708";
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+
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+ fragment@0 {
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+ target = <&smi>;
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+ __overlay__ {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&smi_pins>;
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+ status = "okay";
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+ };
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+ };
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+
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+ fragment@1 {
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+ target = <&soc>;
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+ __overlay__ {
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+
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+ nand: flash@0 {
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+ compatible = "brcm,bcm2835-smi-nand";
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+ smi_handle = <&smi>;
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+ status = "okay";
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+
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+ partition@0 {
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+ label = "stage2";
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+ // 128k
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+ reg = <0 0x20000>;
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+ read-only;
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+ };
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+ partition@1 {
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+ label = "firmware";
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+ // 16M
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+ reg = <0x20000 0x1000000>;
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+ read-only;
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+ };
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+ partition@2 {
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+ label = "root";
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+ // 2G (will need to use 64 bit for >=4G)
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+ reg = <0x1020000 0x80000000>;
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+ };
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+ };
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+ };
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+ };
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+
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+ fragment@2 {
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+ target = <&gpio>;
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+ __overlay__ {
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+ smi_pins: smi_pins {
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+ brcm,pins = <0 1 2 3 4 5 6 7 8 9 10 11
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+ 12 13 14 15>;
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+ /* Alt 1: SMI */
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+ brcm,function = <5 5 5 5 5 5 5 5 5 5 5
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+ 5 5 5 5 5>;
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+ /* /CS, /WE and /OE are pulled high, as they are
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+ generally active low signals */
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+ brcm,pull = <2 2 2 2 2 2 2 2 0 0 0 0 0 0 0 0>;
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+ };
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+ };
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+ };
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+};
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--- a/arch/arm/configs/bcm2709_defconfig
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+++ b/arch/arm/configs/bcm2709_defconfig
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@@ -392,6 +392,10 @@ CONFIG_DEVTMPFS=y
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CONFIG_DEVTMPFS_MOUNT=y
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CONFIG_DMA_CMA=y
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CONFIG_CMA_SIZE_MBYTES=5
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+CONFIG_MTD=m
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+CONFIG_MTD_BLOCK=m
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+CONFIG_MTD_NAND=m
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+CONFIG_MTD_UBI=m
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CONFIG_ZRAM=m
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CONFIG_ZRAM_LZ4_COMPRESS=y
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CONFIG_BLK_DEV_LOOP=y
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@@ -1140,6 +1144,9 @@ CONFIG_CONFIGFS_FS=y
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CONFIG_ECRYPT_FS=m
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CONFIG_HFS_FS=m
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CONFIG_HFSPLUS_FS=m
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+CONFIG_JFFS2_FS=m
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+CONFIG_JFFS2_SUMMARY=y
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+CONFIG_UBIFS_FS=m
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CONFIG_SQUASHFS=m
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CONFIG_SQUASHFS_XATTR=y
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CONFIG_SQUASHFS_LZO=y
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--- a/arch/arm/configs/bcmrpi_defconfig
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+++ b/arch/arm/configs/bcmrpi_defconfig
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@@ -385,6 +385,10 @@ CONFIG_DEVTMPFS=y
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CONFIG_DEVTMPFS_MOUNT=y
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CONFIG_DMA_CMA=y
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CONFIG_CMA_SIZE_MBYTES=5
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+CONFIG_MTD=m
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+CONFIG_MTD_BLOCK=m
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+CONFIG_MTD_NAND=m
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+CONFIG_MTD_UBI=m
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CONFIG_ZRAM=m
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CONFIG_ZRAM_LZ4_COMPRESS=y
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CONFIG_BLK_DEV_LOOP=y
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@@ -1133,6 +1137,9 @@ CONFIG_CONFIGFS_FS=y
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CONFIG_ECRYPT_FS=m
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CONFIG_HFS_FS=m
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CONFIG_HFSPLUS_FS=m
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+CONFIG_JFFS2_FS=m
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+CONFIG_JFFS2_SUMMARY=y
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+CONFIG_UBIFS_FS=m
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CONFIG_SQUASHFS=m
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CONFIG_SQUASHFS_XATTR=y
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CONFIG_SQUASHFS_LZO=y
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--- a/drivers/mtd/nand/Kconfig
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+++ b/drivers/mtd/nand/Kconfig
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@@ -41,6 +41,13 @@ config MTD_SM_COMMON
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tristate
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default n
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+config MTD_NAND_BCM2835_SMI
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+ tristate "Use Broadcom's Secondary Memory Interface as a NAND controller (BCM283x)"
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+ depends on (MACH_BCM2708 || MACH_BCM2709 || ARCH_BCM2835) && BCM2835_SMI && MTD_NAND
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+ default m
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+ help
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+ Uses the BCM2835's SMI peripheral as a NAND controller.
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+
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config MTD_NAND_DENALI
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tristate "Support Denali NAND controller"
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depends on HAS_DMA
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--- a/drivers/mtd/nand/Makefile
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+++ b/drivers/mtd/nand/Makefile
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@@ -14,6 +14,7 @@ obj-$(CONFIG_MTD_NAND_DENALI) += denali
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obj-$(CONFIG_MTD_NAND_DENALI_PCI) += denali_pci.o
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obj-$(CONFIG_MTD_NAND_DENALI_DT) += denali_dt.o
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obj-$(CONFIG_MTD_NAND_AU1550) += au1550nd.o
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+obj-$(CONFIG_MTD_NAND_BCM2835_SMI) += bcm2835_smi_nand.o
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obj-$(CONFIG_MTD_NAND_BF5XX) += bf5xx_nand.o
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obj-$(CONFIG_MTD_NAND_S3C2410) += s3c2410.o
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obj-$(CONFIG_MTD_NAND_DAVINCI) += davinci_nand.o
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--- /dev/null
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+++ b/drivers/mtd/nand/bcm2835_smi_nand.c
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@@ -0,0 +1,268 @@
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+/**
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+ * NAND flash driver for Broadcom Secondary Memory Interface
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+ *
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+ * Written by Luke Wren <luke@raspberrypi.org>
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+ * Copyright (c) 2015, Raspberry Pi (Trading) Ltd.
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+ *
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+ * Redistribution and use in source and binary forms, with or without
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+ * modification, are permitted provided that the following conditions
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+ * are met:
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+ * 1. Redistributions of source code must retain the above copyright
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+ * notice, this list of conditions, and the following disclaimer,
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+ * without modification.
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+ * 2. Redistributions in binary form must reproduce the above copyright
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+ * notice, this list of conditions and the following disclaimer in the
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+ * documentation and/or other materials provided with the distribution.
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+ * 3. The names of the above-listed copyright holders may not be used
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+ * to endorse or promote products derived from this software without
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+ * specific prior written permission.
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+ *
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+ * ALTERNATIVELY, this software may be distributed under the terms of the
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+ * GNU General Public License ("GPL") version 2, as published by the Free
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+ * Software Foundation.
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+ *
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+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
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+ * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
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+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
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+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
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+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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+ */
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+
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+#include <linux/kernel.h>
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+#include <linux/module.h>
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+#include <linux/of.h>
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+#include <linux/platform_device.h>
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+#include <linux/slab.h>
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+#include <linux/mtd/nand.h>
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+#include <linux/mtd/partitions.h>
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+
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+#include <linux/broadcom/bcm2835_smi.h>
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+
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+#define DEVICE_NAME "bcm2835-smi-nand"
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+#define DRIVER_NAME "smi-nand-bcm2835"
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+
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+struct bcm2835_smi_nand_host {
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+ struct bcm2835_smi_instance *smi_inst;
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+ struct nand_chip nand_chip;
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+ struct mtd_info mtd;
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+ struct device *dev;
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+};
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+
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+/****************************************************************************
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+*
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+* NAND functionality implementation
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+*
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+****************************************************************************/
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+
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+#define SMI_NAND_CLE_PIN 0x01
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+#define SMI_NAND_ALE_PIN 0x02
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+
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+static inline void bcm2835_smi_nand_cmd_ctrl(struct mtd_info *mtd, int cmd,
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+ unsigned int ctrl)
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+{
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+ uint32_t cmd32 = cmd;
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+ uint32_t addr = ~(SMI_NAND_CLE_PIN | SMI_NAND_ALE_PIN);
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+ struct bcm2835_smi_nand_host *host = dev_get_drvdata(mtd->dev.parent);
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+ struct bcm2835_smi_instance *inst = host->smi_inst;
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+
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+ if (ctrl & NAND_CLE)
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+ addr |= SMI_NAND_CLE_PIN;
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+ if (ctrl & NAND_ALE)
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+ addr |= SMI_NAND_ALE_PIN;
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+ /* Lower ALL the CS pins! */
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+ if (ctrl & NAND_NCE)
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+ addr &= (SMI_NAND_CLE_PIN | SMI_NAND_ALE_PIN);
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+
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+ bcm2835_smi_set_address(inst, addr);
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+
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+ if (cmd != NAND_CMD_NONE)
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+ bcm2835_smi_write_buf(inst, &cmd32, 1);
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+}
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+
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+static inline uint8_t bcm2835_smi_nand_read_byte(struct mtd_info *mtd)
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+{
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+ uint8_t byte;
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+ struct bcm2835_smi_nand_host *host = dev_get_drvdata(mtd->dev.parent);
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+ struct bcm2835_smi_instance *inst = host->smi_inst;
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+
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+ bcm2835_smi_read_buf(inst, &byte, 1);
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+ return byte;
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+}
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+
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+static inline void bcm2835_smi_nand_write_byte(struct mtd_info *mtd,
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+ uint8_t byte)
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+{
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+ struct bcm2835_smi_nand_host *host = dev_get_drvdata(mtd->dev.parent);
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+ struct bcm2835_smi_instance *inst = host->smi_inst;
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+
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+ bcm2835_smi_write_buf(inst, &byte, 1);
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+}
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+
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+static inline void bcm2835_smi_nand_write_buf(struct mtd_info *mtd,
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+ const uint8_t *buf, int len)
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+{
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+ struct bcm2835_smi_nand_host *host = dev_get_drvdata(mtd->dev.parent);
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+ struct bcm2835_smi_instance *inst = host->smi_inst;
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+
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+ bcm2835_smi_write_buf(inst, buf, len);
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+}
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+
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+static inline void bcm2835_smi_nand_read_buf(struct mtd_info *mtd,
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+ uint8_t *buf, int len)
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+{
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+ struct bcm2835_smi_nand_host *host = dev_get_drvdata(mtd->dev.parent);
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+ struct bcm2835_smi_instance *inst = host->smi_inst;
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+
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+ bcm2835_smi_read_buf(inst, buf, len);
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+}
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+
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+/****************************************************************************
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+*
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+* Probe and remove functions
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+*
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+***************************************************************************/
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+
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+static int bcm2835_smi_nand_probe(struct platform_device *pdev)
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+{
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+ struct bcm2835_smi_nand_host *host;
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+ struct nand_chip *this;
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+ struct mtd_info *mtd;
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+ struct device *dev = &pdev->dev;
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+ struct device_node *node = dev->of_node, *smi_node;
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+ struct mtd_part_parser_data ppdata;
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+ struct smi_settings *smi_settings;
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+ struct bcm2835_smi_instance *smi_inst;
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+ int ret = -ENXIO;
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+
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+ if (!node) {
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+ dev_err(dev, "No device tree node supplied!");
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+ return -EINVAL;
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+ }
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+
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+ smi_node = of_parse_phandle(node, "smi_handle", 0);
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+
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+ /* Request use of SMI peripheral: */
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+ smi_inst = bcm2835_smi_get(smi_node);
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+
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+ if (!smi_inst) {
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+ dev_err(dev, "Could not register with SMI.");
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+ return -EPROBE_DEFER;
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+ }
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+
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+ /* Set SMI timing and bus width */
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+
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+ smi_settings = bcm2835_smi_get_settings_from_regs(smi_inst);
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+
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+ smi_settings->data_width = SMI_WIDTH_8BIT;
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+ smi_settings->read_setup_time = 2;
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+ smi_settings->read_hold_time = 1;
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+ smi_settings->read_pace_time = 1;
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+ smi_settings->read_strobe_time = 3;
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+
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+ smi_settings->write_setup_time = 2;
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+ smi_settings->write_hold_time = 1;
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+ smi_settings->write_pace_time = 1;
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+ smi_settings->write_strobe_time = 3;
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+
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+ bcm2835_smi_set_regs_from_settings(smi_inst);
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+
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+ host = devm_kzalloc(dev, sizeof(struct bcm2835_smi_nand_host),
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+ GFP_KERNEL);
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+ if (!host)
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+ return -ENOMEM;
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+
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+ host->dev = dev;
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+ host->smi_inst = smi_inst;
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+
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+ platform_set_drvdata(pdev, host);
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+
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+ /* Link the structures together */
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+
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+ this = &host->nand_chip;
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+ mtd = &host->mtd;
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+ mtd->priv = this;
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+ mtd->owner = THIS_MODULE;
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+ mtd->dev.parent = dev;
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+ mtd->name = DRIVER_NAME;
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+ ppdata.of_node = node;
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+
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+ /* 20 us command delay time... */
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+ this->chip_delay = 20;
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+
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+ this->priv = host;
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+ this->cmd_ctrl = bcm2835_smi_nand_cmd_ctrl;
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+ this->read_byte = bcm2835_smi_nand_read_byte;
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+ this->write_byte = bcm2835_smi_nand_write_byte;
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+ this->write_buf = bcm2835_smi_nand_write_buf;
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+ this->read_buf = bcm2835_smi_nand_read_buf;
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+
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+ this->ecc.mode = NAND_ECC_SOFT;
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+
|
|
+ /* Should never be accessed directly: */
|
|
+
|
|
+ this->IO_ADDR_R = (void *)0xdeadbeef;
|
|
+ this->IO_ADDR_W = (void *)0xdeadbeef;
|
|
+
|
|
+ /* First scan to find the device and get the page size */
|
|
+
|
|
+ if (nand_scan_ident(mtd, 1, NULL))
|
|
+ return -ENXIO;
|
|
+
|
|
+ /* Second phase scan */
|
|
+
|
|
+ if (nand_scan_tail(mtd))
|
|
+ return -ENXIO;
|
|
+
|
|
+ ret = mtd_device_parse_register(mtd, NULL, &ppdata, NULL, 0);
|
|
+ if (!ret)
|
|
+ return 0;
|
|
+
|
|
+ nand_release(mtd);
|
|
+ return -EINVAL;
|
|
+}
|
|
+
|
|
+static int bcm2835_smi_nand_remove(struct platform_device *pdev)
|
|
+{
|
|
+ struct bcm2835_smi_nand_host *host = platform_get_drvdata(pdev);
|
|
+
|
|
+ nand_release(&host->mtd);
|
|
+
|
|
+ return 0;
|
|
+}
|
|
+
|
|
+/****************************************************************************
|
|
+*
|
|
+* Register the driver with device tree
|
|
+*
|
|
+***************************************************************************/
|
|
+
|
|
+static const struct of_device_id bcm2835_smi_nand_of_match[] = {
|
|
+ {.compatible = "brcm,bcm2835-smi-nand",},
|
|
+ { /* sentinel */ }
|
|
+};
|
|
+
|
|
+MODULE_DEVICE_TABLE(of, bcm2835_smi_nand_of_match);
|
|
+
|
|
+static struct platform_driver bcm2835_smi_nand_driver = {
|
|
+ .probe = bcm2835_smi_nand_probe,
|
|
+ .remove = bcm2835_smi_nand_remove,
|
|
+ .driver = {
|
|
+ .name = DRIVER_NAME,
|
|
+ .owner = THIS_MODULE,
|
|
+ .of_match_table = bcm2835_smi_nand_of_match,
|
|
+ },
|
|
+};
|
|
+
|
|
+module_platform_driver(bcm2835_smi_nand_driver);
|
|
+
|
|
+MODULE_ALIAS("platform:smi-nand-bcm2835");
|
|
+MODULE_LICENSE("GPL");
|
|
+MODULE_DESCRIPTION
|
|
+ ("Driver for NAND chips using Broadcom Secondary Memory Interface");
|
|
+MODULE_AUTHOR("Luke Wren <luke@raspberrypi.org>");
|