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Qualcomm Atheros IPQ807x is a modern WiSoC featuring: * Quad Core ARMv8 Cortex A-53 * @ 2.2 GHz (IPQ8072A/4A/6A/8A) Codename Hawkeye * @ 1.4 GHz (IPQ8070A/1A) Codename Acorn * Dual Band simultaneaous IEEE 802.11ax * 5G: 8x8/80 or 4x4/160MHz (IPQ8074A/8A) * 5G: 4x4/80 or 2x2/160MHz (IPQ8071A/2A/6A) * 5G: 2x2/80MHz (IPQ8070A) * 2G: 4x4/40MHz (IPQ8072A/4A/6A/8A) * 2G: 2x2/40MHz (IPQ8070A/1A) * 1x PSGMII via QCA8072/5 (Max 5x 1GbE ports) * 2x SGMII/USXGMII (1/2.5/5/10 GbE) on Hawkeye * 2x SGMII/USXGMII (1/2.5/5 GbE) on Acorn * DDR3L/4 32/16 bit up to 2400MT/s * SDIO 3.0/SD card 3.0/eMMC 5.1 * Dual USB 3.0 * One PCIe Gen2.1 and one PCIe Gen3.0 port (Single lane) * Parallel NAND (ONFI)/LCD * 6x QUP BLSP SPI/I2C/UART * I2S, PCM, and TDMA * HW PWM * 1.8V configurable GPIO * Companion PMP8074 PMIC via SPMI (GPIOS, RTC etc) Note that only v2 SOC models aka the ones ending with A suffix are supported, v1 models do not comply to the final 802.11ax and have lower clocks, lack the Gen3 PCIe etc. SoC itself has two UBI32 cores for the NSS offloading system, however currently no offloading is supported. Signed-off-by: Robert Marko <robimarko@gmail.com>
51 lines
1.5 KiB
Diff
51 lines
1.5 KiB
Diff
From b7b7ea3a0cab42d4f1d4c9ae9eb7c7a3d03e7982 Mon Sep 17 00:00:00 2001
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From: Robert Marko <robimarko@gmail.com>
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Date: Fri, 30 Dec 2022 22:51:47 +0100
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Subject: [PATCH] cpufreq: qcom-nvmem: reuse socinfo SMEM item struct
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Now that socinfo SMEM item struct and defines have been moved to a header
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so we can utilize that instead.
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Now the SMEM value can be accesed directly, there is no need for defining
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the ID for the SMEM request as well.
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Signed-off-by: Robert Marko <robimarko@gmail.com>
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---
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drivers/cpufreq/qcom-cpufreq-nvmem.c | 14 +++++---------
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1 file changed, 5 insertions(+), 9 deletions(-)
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--- a/drivers/cpufreq/qcom-cpufreq-nvmem.c
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+++ b/drivers/cpufreq/qcom-cpufreq-nvmem.c
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@@ -28,8 +28,7 @@
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#include <linux/pm_opp.h>
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#include <linux/slab.h>
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#include <linux/soc/qcom/smem.h>
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-
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-#define MSM_ID_SMEM 137
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+#include <linux/soc/qcom/socinfo.h>
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enum _msm_id {
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MSM8996V3 = 0xF6ul,
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@@ -145,17 +144,14 @@ static void get_krait_bin_format_b(struc
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static enum _msm8996_version qcom_cpufreq_get_msm_id(void)
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{
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size_t len;
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- u32 *msm_id;
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+ struct socinfo *info;
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enum _msm8996_version version;
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- msm_id = qcom_smem_get(QCOM_SMEM_HOST_ANY, MSM_ID_SMEM, &len);
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- if (IS_ERR(msm_id))
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+ info = qcom_smem_get(QCOM_SMEM_HOST_ANY, SMEM_HW_SW_BUILD_ID, &len);
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+ if (IS_ERR(info))
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return NUM_OF_MSM8996_VERSIONS;
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- /* The first 4 bytes are format, next to them is the actual msm-id */
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- msm_id++;
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-
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- switch ((enum _msm_id)*msm_id) {
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+ switch (info->id) {
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case MSM8996V3:
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case APQ8096V3:
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version = MSM8996_V3;
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